Academic Year 2023/2024

  • Docente: Cecilia Metra
  • Credits: 6
  • SSD: ING-INF/01
  • Language: Italian
  • Moduli: Cecilia Metra (Modulo 1) Martin Eugenio Omana (Modulo 2)
  • Teaching Mode: Traditional lectures (Modulo 1) Traditional lectures (Modulo 2)
  • Campus: Bologna
  • Corso: Second cycle degree programme (LM) in Electronic Engineering (cod. 0934)

Learning outcomes

To study the techniques for testing and design for testability of integrated circuits and systems, and the design strategies for integrated circuits and systems with high reliability and resiliency.

Course contents

Introduction to Digital Circuit and Systems' Testing

  • Definitions and motivations
  • Position within the VLSI process
  • Yield and production cost of an IC
  • Some example of testing process: Characterization Testing; Manufacturing Testing; Burn-in; Incoming Inspection

Main Failure Mechanisms

  • Electromigration: Physical Description and Examples; Interconnects Reliability; Copper Interconnects; Interconnects Reliability
  • Oxide Wear-out: Oxide Molecular Structure Traps; Wear-out and Breakdown
  • Oxide Scaling: Scaling and leakage; Scaling and mobility
  • Radiation and Alpha Particles: Physical Description and Fault Model
  • Electrical Parameter Variation: Transistor Parameters; Interconnects' Parameters; Temperature
  • Interconnects Scaling and Crosstalk
  • Power Supply Noise (IR Drop Noise, Delta I Noise)

Fault Models

  • Stuck-At Faults (SAs): Basics on Testing for SAs
  • Fault Equivalence and Fault Collapsing
  • Checkpoint Theorem
  • Fault Dominance and Fault Collapsing
  • Stuck-Open Faults: Possible Testing
  • Stuck-On Faults: Possible Testing
  • Bridging Faults, Delay Faulrts, Crosstalk Faults and Transient Faults: Possible Testing

Automatic Test Pattern Generation (ATPG)

  • Definition
  • ATPG Algebras
  • Exhaustive Algorithms
  • Random Algorithms
  • Path Sensitization
  • Fault Coverage and Test Efficiency

Automatic Test Equipment (ATE)

  • Components and Specification
  • Cost

Fault Diagnosis

  • Definitions and Motivations
  • Fault Dictionary
  • Diagnostic Tree

Testability Measures

  • Motivations and Use
  • Controllability and Observability
  • Sandia Controllability ed Observability Analysis Program

IDDQ Testing

  • Basic Idea
  • Comparison with Other Testing Techniques
  • Detected Faults
  • Current Limit Setting
  • Built-In Current Sensors (BICS)
  • Limitations of IDDQ Testing
  • Delta IDDQ Testing

Design for Testability (DFT) Techniques

  • Introduction
  • Ad-Hoc and Structural Methods
  • Full Scan
  • Partial Scan
  • Boundary Scan
  • Built-In-Self Test (BIST)
  • Built-In-Logic-Block-Observer (BILBO)

Fault-Tolerant Techniques

  • Introduction: Motivations; Applications
  • Modular Redundancy: Basic Strategy; Voter Design and Reliability; Common Mode Failures; Diagnosis of Faulty Modules
  • On-Line Testing and Recovery: Duplication and Comparison; Self Checking Circuits
  • Self-Checking Circuits: Properties; Fault Hypothesis; Design of Self Checking Functional Blocks; Design of Checkers; Error Indicators
  • Error Detecting Codes: Berger Codes (Theory and Checker Design); Parity Codes (Theory and Checker Design); m-out-of-n Codes (Theory and Checker Design)
  • Recovery Techniques: Roll Back and Retry; Reconfiguration
  • Error Correcting Codes: Introduction to Linear Parity Check Codes; Single Error Correction Hamming Codes; Single Error Correction/Double Error Detection Hsiao Codes; Encoding and Decoding Circuits

The course includes practice sessions in laboratories on:

  • Electrical level simulations of resistive bridging faults, crosstalk faults and transient faults, and analysis of their effects in some circuits of interest
  • Design of basic components usually employed in high reliability systems and their prototyping by means of FPGA


J. Segura C. F. Hawkins, “CMOS Electronics – How It Works, How It Fails” IEEE Press – Wiley, 2004.

M. L. Bushnell, V. D. Agrawal, “Essential of Electronic Testing”, Kluwer Academic Publishers, 2000

M. Abramovici, M. A. Bruer, A. D. Friedman, “Digital Systems Testing and Testable Design”, Computer Science Press, 1990

S. Mourad, Y. Zorian, “Principles of Testing Electronic Systems”, Essential of Electronic Testing”,Wiley, 2000

N. K. Jha, S. Kundu, “Testing and Reliable Design of CMOS Circuits”, Kluwer Academic Publishers, 1990

P. K. Lala, “Self-Checking and Fault Tolerant Digital Design”, Morgan Caufmann Publ, 2001

Teaching methods

Lessons in classroom and computer exercises performed in laboratory.

Assessment methods

Oral examination. Questions will cover any topic addressed in class and in the laboratory. Specific questions may follow aimed at verifying the understanding of specific issues inherent to the topics covered in the course. The final grade will be formulated based on the answers provided to the asked questions.

Teaching tools

PC, projector, Power Point slides.

Office hours

See the website of Cecilia Metra

See the website of Martin Eugenio Omana