69437 - NANOELECTRONICS M

Learning outcomes

The “Nanoelectronics” course aims to deliver the conceptual tools to the attending students to face the study of nanometric-scale transistors. The complexity of quantum transport equations makes it difficult to develop physics-based compact models and requires the adoption of numerical techniques for their solution. Therefore, the course includes within its content the study of the main numerical methods for the solution of the close- and open-boundary Schroedinger equation and its coupling with Poisson’s equation. The investigated devices include fully-depleted (FD) silicon-on-insulator (SOI) FETs, widely used in “Smart Power” circuit applications, multi-gate (MG) FETs, representing the workhorse of several technology nodes from 22 to 3 nm, and the latest nano-sheet (NS) FETs already used within for the most advanced technology nodes at 2.2 and 1.8 nm. The course will additionally address steep-slope devices, including tunnel FETs (TFETs) and novel solutions for subthreshold swings below 60 mV/dec based on the use of 2D materials.

Course contents

The evolution of microelectronic technologies made it possible to fabricate integrated systems containing several billions of elementary transistors with linear dimensions around ten nanometers. The lateral confinement of carriers generates a motion quantization normal to the silicon-oxide interface which reduces the degrees-of-freedom of the electron gas, thus altering the density of states within the semiconductor and the computation methodology of the carrier concentration. Furthermore, the longitudinal dimension of the device active region is nowadays comparable with the electron mean-free path, and the changing scale of the internal electric fields makes the applicability of the drift-diffusion model invalid. A deep revision of the device-analysis classical models, as well as the development of new methods able to interpret such effects as carrier quantum confinement, tunneling and ballistic or quasi-ballistic transport, are thus keenly required.

The course of Nanoelectronics aims to address such a need, and to investigate the properties of carrier transport in nanometric-scale structures. The concept of local quasi-equilibrium is thus abandoned and so is the description of carrier transport via the concepts of mobility and diffusivity. The nature of the new constitutive equations becomes strongly non-local and the importance of the boundary conditions, by which the device under investigation is isolated from the neighboring circuit, increases. The need to solve the coupled Schroedinger and Poisson equations within modern devices becomes often mandatory to assess their performance characteristics and frequently imposes a numerical approach to their solution.

The devices to be studied include, due to their practical importance, multi-gate transistors which turned out the be the basic components of the technological nodes at 7, 5 and 3 nanometers; ultra-thin body (UTB) silicon-on-insulator (SOI) transistors, silicon nanowire field-effect transistors (NW-FETs) and Nano-Sheet (NS) FETs, recently announced by TSMC and Intel as the basic components of their most advanced technology nodes at 2.1 and 1.8 nanometers. The course will examine as well Tunnel FETs (TFETs) which exhibit a steep subthreshold swing of their transfer characteristics and new device concepts based on 2D materials.

Specific course contents

1) Foundations of Quantum Mechanics and matter structure

1. Wave properties of electrons
2. General principles of Quantum Mechanics
3. Hints on Quantum Eletrodynamics
4. Elementary applications
5. Hydrogen-like atoms
6. Electron spin. Pauli equations
7. Independent- and dependent-perturbation theory
8. The WKB method
9. Hints on relativistic quantum theory: the Dirac equation
   

2) Particle systems and Solid-State Theory

1. Electron indistiguishbility and exclusion principle
2. The adiabatic approximation
3. Lattice vibrations in molecules and solid bodies
4. Quantum statistics
5. Electrons and holes in semiconductors
6. Bloch theorem
7. Effective-mass theorem
8. Energy bands in semiconductors

3) Carrier transport in semiconductors

1. Boltzmann transport equation (BTE)
2. Continuity equations in semiconductors
3. Transport equations in semiconductors

4) Nanometric-scale transistors

1. Double-gate symmetrical transistor (DG-FET)
2. Fully-depleted silicon-on-insulator transistor (FD-SOI FET)
3. Surrounding-gate cylindrical transistor (SG-FET)
4. Tunnel-effect transistor (T-FET)
5. Hints on transistors based on 2D materials

 

Readings/Bibliography

1. L.I. Schiff: Quantum Mechanics, McGrow-Hill
2. A. Messiah: Quantum Mechanics, Dover
3. S.M. Sze: Physics of Semiconductor Devices, Wiley
4. M. Rudan: Physics of Semiconductor Devices, Springer
5. S. Datta: Quantum Transport, Cambridge
6. M. Lundstrom, J. Guo: Nanoscale Transistors, Springer
7. H.J.M. Veendrick: Nanometer CMOS ICs, Springer
8. G. Baccarani: Notes on the Nanoelectronics Course

Teaching methods

Module 1 of the course will be traditionally offered with lectures carried out at the classroom blackboard and its content is expected to provide the suitable background for the subsequent study of advanced devices.
Module 2 of the course is going to address the theory of advanced devices, and will be enhanced with laboratory work aiming at the execution of device numerical simulations.

Assessment methods

The content learning of Module 1 will be assessed through an oral examination on the subjects developed during the lectures. The assessment of the content learning of Module 2 will occur via an oral examination and will possibly be integrated with the exposure of a short thesis work on a theme agreed with the teacher of the same module. The final score will be agreed by the two teachers of the course from a global evaluation of the candidate performance.

Teaching tools

The supporting tools of the teaching activity will be, first, the lecture notes, possibly integrated on specific topics by the the Bibliography textbooks. The numerical simulation work will be performed taking advantage from the availability of suitable CAD tools.

Office hours

See the website of Giorgio Baccarani

See the website of Elena Gnani