- Docente: Stefano Mattoccia
- Credits: 6
- SSD: ING-INF/05
- Language: Italian
- Teaching Mode: Traditional lectures
- Campus: Bologna
- Corso: First cycle degree programme (L) in Computer Engineering (cod. 0926)
Learning outcomes
The course aims at providing basic computer architecture principles
focusing on RISC (Reduced Instruction Set Computer) processors such
as DLX and ARM. The outcome of the course are methodologies to
design systems based on modern microprocessors focusing on
interfacing techniques for memory and input/output devices.
Course contents
Microprocessor evolution - Processor hierarchy and design methodologies - RISC architectures and comparison to CISC architectures - Memories and address decoding techniques - Sequential control units - Pieplined control units - I/O handling - ARM Processor
Readings/Bibliography
Slides
Further reading (not strictly required):
- S. Furber, “ARM –System-on-a-chip architecture”, Addison
Wesley
- Hennessy Patterson -Computer architecture: a quantitative
approach - Caps. 1..5 - Morgan Kaufmann pub. Inc.
- Giacomo Bucci - Architettura e organizzazione dei calcolatori
elettronici - McGraw-Hill
Teaching methods
At the end of each topic the students will be faced with simple
exercises for self evaluation purposes. For each exercise
proposed the solution will be discussed with the students.
Assessment methods
Written exam
Teaching tools
Available on the course website:
http://vision.deis.unibo.it/~smatt/Site/Courses.html
Links to further information
http://www.vision.deis.unibo.it/smatt
Office hours
See the website of Stefano Mattoccia