- Docente: Francesco Conti
- Credits: 6
- SSD: IINF-05/A
- Language: English
- Moduli: Francesco Conti (Modulo 1) Angelo Garofalo (Modulo 2)
- Teaching Mode: In-person learning (entirely or partially) In-person learning (entirely or partially) (Modulo 1); In-person learning (entirely or partially) (Modulo 2)
- Campus: Bologna
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Corso:
Second cycle degree programme (LM) in
Communications Engineering (cod. 6712)
Also valid for Second cycle degree programme (LM) in Electronic Engineering (cod. 6716)
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from Oct 15, 2026 to Nov 10, 2026
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from Nov 12, 2026 to Dec 17, 2026
Learning outcomes
Provide a vision of digital circuits at gate and register transfer level. Overview of microprocessor and memory architectures. Basics of testing, performance and power consumption at system level.
Syllabus
The syllabus has not been published yet.
Office hours
See the website of Francesco Conti
See the website of Angelo Garofalo