28722 - Electronics T-1

Course Unit Page


This teaching activity contributes to the achievement of the Sustainable Development Goals of the UN 2030 Agenda.

Quality education Affordable and clean energy Industry, innovation and infrastructure

Academic Year 2021/2022

Learning outcomes

The course aims to provide basic knowledge on the functioning of elementary electronic devices, as well as on the analysis and design of digital circuits.

The student will learn:
- how to design digital circuits using the CMOS technology;
- analyze and compare different circuit realizations according to the most important performance metrics (power consumption, nois margin, cost, delay...);
- simulate simple digital circuits

Course contents

Requirements/Prior knowledge

Prerequisite for the understanding of the arguments is the knowledge of the key concepts of the theory of linear electrical circuits developed in the Course of Electrotechnics. In particular the student should be able to analyze the behaviour of a linear circuit both in stationary and transient conditions.

Fluent spoken and written Italian is a necessary pre-requisite: all lectures and tutorials, and all study material will be in Italian.

Course Contents

- Basics of microelectronics: description of how the functional behavior of transistors n-and p-MOS. Operating regions and constitutive equations. The n-MOS inverter with resistive load: voltage transfer characteristic, static power consumption. The p-MOS inverter with resistive load: voltage transfer characteristic, static power consumption.

- The CMOS inverter: operating regions of the transistors and static input-output characteristic. Power consumption. The CMOS inverter in transient conditions. Transistor parasitic capacitances: calculation of the CMOS inverter inputs capacity.

- Design of a CMOS buffer in order to minimize the propagation delay.

- Properties of digital circuits: cost, input capacity, fan-out, propagation delay, power consumption, power-delay product, noise margin.

- Fully-CMOS Gate: pull-up and pull-down networks. Gate topology, analysis and synthesis of logic functions. MOS transistors connected in series and in parallel. Design of a logic function in Fully-CMOS according to the switching time requirements.

- Dinamic Gates: DOMINO logic, dual-rail DOMINO, and zipper logic. Charge redistribution in internal nodes and skew.

- Pass-transistor for signal transfer. Non-idealities of the nMOS and pMOS based pass-transistor. Latch-D realized with NOT and pass transistors.

- Synchronous digital systems: the latch circuit. Latch SR, latch JK and latch D with NAND and NOR logic gates and feedback with NOT.

- Circuits able to sampled on a clock edge: Flip-flop master-slave. Static and dynamic flip-flops.

- Introduction to memories. Memory classification: volatile and non-volatile memories. Row and column decoders. Description of the operation of the SRAM cell with 6T. Reading and writing of an SRAM cell. Description of the operation of the sense amplifier of SRAM memories. The DRAM cell. Reading and writing of a DRAM cell. The phenomenon of charge redistribution. The sense amplifier in DRAM memories. Differences between SRAM and DRAM.

- Introduction to non-volatile memories. ROM, PROM and Flash memories. NOR and NAND architecture of non volatile memories. The flash memory, electron injection in the floating gate. Endurance and data retention of the memory.

- The MOS transistor. Continuity equation. Quasi-stationary conditions. Drift-diffusion transport model. Gradual channel approximation in the calculation of the drain current. Parabolic-linear model for the MOS transistor.

- CMOS technology fabrication process steps.


Lecture notes.

For further reading and consultation:

  • P. Spirito, Elettronica Digitale, McGraw-Hill, 2006.
  • E. Gnani - ELETTRONICA DIGITALE DI BASE A.A.2013-14 ISBN 9781308077789
  • Digital Integrated Circuits, J. M.Rabaey
    Disponibile anche in italiano: Circuiti integrati digitali. L'ottica del progettista. Jan M. Rabaey, Anantha Chandrakasan, Bora Nikolic

Teaching methods

The course consists of classroom lectures in which the basic electronic elements are presented. In particular we will focus on the key concepts of Digital Electronics. The theoretical presentation of each topic is followed by several lectures devoted to the solution of exercises and specific problems aiming to acquire the method for analysing and designing simple digital circuits.

Assessment methods

Learning assessment is done through a final exam that ensures acquisition of knowledge and expected skills. the student must pass the written test, and can then decide whether to take the oral test.
The written session assesses the student's ability to realize simple logic functions.

The oral test consists in 3 questions, to verify the ability to analyze circuits realized with MOS transistors. To obtain a passing grade, the student must demonstrate the capacity to manage the key concepts illustrated in the course program. The duration of the oral test is about 45 minutes.

To attend the exam it is required to register via Almaesami. Those who do not succeed to register by the deadline are required to promptly notify the problem at the Secretary's office.
The minutes of the evaluation is obtained during any of oral sessions set by the teacher during the academic year. It is possible to view the written test during the verbalization date immediately following the written exam. The possibility of using alternative hours to take vision of the written exam is reserved for exceptional cases.

Teaching tools

Teaching materials are available at IOL website

Office hours

See the website of Elena Gnani