28012 - Electronic Calculators T

Learning outcomes

The course aims at providing basic computer architecture principles focusing on RISC (Reduced Instruction Set Computer) processors with a focus on the DLX CPU. The outcome of the course are methodologies to design systems based on modern microprocessors focusing on interfacing techniques for memory and input/output devices.

Course contents

Microprocessor evolution - Processor hierarchy and design methodologies - RISC architectures and comparison to CISC architectures - Memories and address decoding techniques - Sequential control units - Pieplined control units - I/O handling - Interrupts

Readings/Bibliography

Slides available in Virtuale.

Further reading (not strictly required):

- Hennessy Patterson -Computer architecture: a quantitative approach - Caps. 1..5 - Morgan Kaufmann pub. Inc.

- David A Patterson, John L Hennessy, COMPUTER ORGANIZATION AND DESIGN, Morgan Kaufmann

Teaching methods

At the end of each topic the students will be faced with simple exercises for self evaluation purposes. For each proposed exercise, the solution(s) will be thoroughly analysed and discussed with the students.

Assessment methods

Written exam: questions regarding the course topics and design of a CPU-based system. A satisfactory answer to the questions and the design of a CPU-based system is crucial for a positive evaluation.
The methodologies learned in Logic Design T are essential.

Teaching tools

Slides and exercises, often with detailed solution, are available in Virtuale.

Office hours

See the website of Stefano Mattoccia