35364 - Digital Architectures for Signal Processing M

Learning outcomes

Analysis of algorithms for image compression and speech processing from the perspective of the digital system designer. Definitions of the specifications derived from these algorithms. Spec mapping on various computational architectures. Examples of digital signal processing algorithms suitable for parallel architectures such as digital signal processors and application specific system on chip.

Course contents

Theory:

• Evaluation metrics for digital signal processing architectures
  
• Architectural techniques for the energy efficiency of digital systems: pipelining, parallelism, multiplexing and examples (arithmetics, digital filters, time-frequency analysis).
• Numerical formats relevant for digital signal processing systems (fixed- and floating-point).
  
• Design of digital systems for low-power digital signal processing.
• Logic and physical synthesis of digital systems, impact of design choices upon performance, power and energy efficiency.
  

Laboratorio:

• Single-core DSP programming (PULPissimo).
• Design and simulation (Siemens QuestaSim) of dedicated hardware accelerators for signal processing.
• Physical implementation of system-on-chip for signal processing: logic synthesis (Synopsys Design Compiler), place and route flows (Cadence Innovus).
  

Readings/Bibliography

Teaching material: all teaching material (slides, links, scientific papers) will be shared by means of Virtuale. Teaching material is distributed in English.

Reference book: D. Marković, R. W. Brodersen, "DSP Architecture Design Essentials", Springer 2012

Teaching methods

Classroom lessons.
Lab work.

Assessment methods

Final Report on lab work.
Oral exam.

Teaching tools

GCC Compiler.
Siemens QuestaSim.
Synopsys Design Compiler.
Cadence Innovus.

Office hours

See the website of Francesco Conti

See the website of Davide Rossi