35009 - Computer Architecture (Graduate Course)

Academic Year 2008/2009

  • Teaching Mode: Traditional lectures
  • Campus: Bologna
  • Corso: Second cycle degree programme (LS) in Electronic Engineering (cod. 0233)

Learning outcomes

Course subject is Computer Architecture: instruction execution models, pipeline, memory hierarchy, bus hierarchy, direct memory access,  peripheral devices
Course goal is providing the digital systems designer with a computer architecture reference model and with the ability to handle systems complexity with a hierarchical approach.
Required initial knowledge: logic design, basics on microprocessor based systems  and fundamentals on information science (for example Reti Logiche L-A,  Calcolatori Elettronici L-A and Fondamenti di Informatica L-A and  L-B, given in the undergraduate courses in Information Engineering at the University of Bologna).
Who could attend: students in computer science, control engineering, microelectronic, telecommunication, bioengineeering; students having in their curricula exams on the following subjects: processor design, operating systems design, compilers design, digital control systems design, computer networks.

Course contents

System Architecture


Memory Hierarchy

  • Goals, reference model and performance parameters
  • memory hierarchy in the Intel IA32 architecture: segmentation, virtual memory, main memory and caches
  • address mapping, write policies, replacement policies; implementation techniques and performance analysis
  • the MESI protocol for memory coherence in shared memory multiprocessor architecture

Processor Architecture
  • Instruction set architecture for multitasking protected systems (Intel IA32 architecture)
  • Instruction level parallelism; dependencies; hazards; hazards avoidance
  • superscalar architectures; superpipelining and underpipelining; non blocking architectures; out of order execution (Tomasulo approach); speculative execution;
  • Introduction to simultaneous multithreading, logical processors, multicore architectures and virtualisation 

Readings/Bibliography

Slides shown during the course are available at the following URL:
http://didattica.arces.unibo.it/index.php?dbName=tsalmon
At this URL you can also find: slides made by the students for the students originating from class notes, and papers related to the syllabus.
 
References
·         Hennessy-Patterson: Computer Architecture a quantitative approach - Seconda edizione, 1996 - Morgan Kaufmann Inc
·         Giacomo Bucci: Architetture e organizzazione dei calcolatori elettronici – McGraw-Hill, 2004
·         Giacomo Bucci: Architetture dei calcolatori elettronici – McGraw-Hill, 2000
·         Patterson-Hennessy "Computer Organization and Design, the hardware/software interface" Morgan Kaufmann - 1994
·         Stone "High-Performance Computer Architecture" Addison Wesley

  • Pentium Pro family Developer's manual (tre volumi-1996)
  • PC System Architecture Series, Mindshare Inc., Addison Wesley. Questa è una serie di guide all’architettura e ai più importanti standard utilizzati nei PC.Tra queste, le più pertinenti sono: Pentium PRO and Pentium II System Architecture, The Unabridged Pentium IV: the IA32 processor genealogy e HyperTransport System Architecture 
·         specifiche dei seguenti standard: Peripheral Component Interconnect (bus PCI), CardBus, Small Computer System Interface (SCSI), Universal Serial Bus (USB), System Management Bus.

Assessment methods

Assessment shall be based on the outcome of a written test.

Test time: 4 hours

Test structure: one or two design exercises, coupled to theory questions. No quiz.

On the course site you'll find examples of previous tests, some of them with solution hints

Teaching tools

A blackboard and a videoprojector.

Links to further information

http://didattica.arces.unibo.it/index.php?dbName=tsalmon

Office hours

See the website of Tullio Salmon Cinotti