- Docente: Stefano Mattoccia
- Credits: 4
- SSD: ING-INF/05
- Language: Italian
- Teaching Mode: Traditional lectures
- Campus: Bologna
- Corso: Second cycle degree programme (LM) in Computer Engineering (cod. 0937)
Learning outcomes
The student will learn modern digital design methodologies for embedded systems based on FPGAs and ARM cores deploying High Level Synthesis tools based on C/C++ languages. The focus will be on practical applications and in particular concerned with a digital image processing/computer vision pipeline, entirely mapped on the Zynq processor with High Level Synthesis tools, processing the images provided by a digital imaging sensors in real-time.
Course contents
The course aims at describing modern digital design methodologies suited to embedded systems based on reconfigurable logic (i.e. FPGA plus ARM cores) focusing on modern tools for high level synthesis that enable to reconfigure FPGAs deploying standard programming languages such as C or C++. Lab sessions with evaluation boards or smart cameras based on FPGAs will follow seminars on specific and relevant topic in this field such as implementation of computer vision/image processing algorithms and the design of an embedded computer vision pipeline. The overall assessment consists in the evaluation of a project concerned with practical applications of the considered architectures.
Readings/Bibliography
Slides and source code of the projects.
Teaching methods
The course deals with topics concerned to modern digital design with FPGA + ARM based systems. Each of these topics will be presented during the course with specific seminar and followed by practical experiments with FPGA based systems (made available to each student/team). Each team (2 students) will select one topic, according to the specifici interest in this field, and will solve a problem deploying an FPGA based system (e.g. smart camera, evaluation board).
Assessment methods
The assessment method consists in the evaluation of project, selected with the students (max 2 for each team) according to their interest in this field, and its mapping on a practical FPGA based system (e.g. smart camera, evaluation board).
Teaching tools
Xilinx's Vivado design suites, project example and evaluation boards (Zedboard and MicroZed).
Links to further information
http://vision.deis.unibo.it/~smatt/Site/Courses.html
Office hours
See the website of Stefano Mattoccia