28012 - Electronic Calculators T

Course Unit Page

SDGs

This teaching activity contributes to the achievement of the Sustainable Development Goals of the UN 2030 Agenda.

Quality education Industry, innovation and infrastructure

Academic Year 2021/2022

Learning outcomes

The course aims at providing basic computer architecture principles focusing on RISC (Reduced Instruction Set Computer) processors such as DLX and ARM. The outcome of the course are methodologies to design systems based on modern microprocessors focusing on interfacing techniques for memory and input/output devices.

Course contents

Microprocessor evolution - Processor hierarchy and design methodologies - RISC architectures and comparison to CISC architectures - Memories and address decoding techniques - Sequential control units - Pieplined control units - I/O handling - ARM Processor

Readings/Bibliography

Slides available in EOL.

Further reading (not strictly required):

- S. Furber, “ARM –System-on-a-chip architecture”, Addison Wesley
- Hennessy Patterson -Computer architecture: a quantitative approach - Caps. 1..5 - Morgan Kaufmann pub. Inc.
- J. Yiu, “The definitive guide to the ARM Cortex M0”,

Teaching methods

At the end of each topic the students will be faced with simple exercises for self evaluation purposes. For each proposed exercise, the solution(s) will be thoroughly analysed and discussed with the students.

Assessment methods

Written exam: design of a CPU-based system and questions concerned with computer architectures. A satisfactory design of the CPU-based system is crucial.

The methodologies learned in Logic Design T are required.

Teaching tools

Slides and exercises with solution are available on the course website.

Office hours

See the website of Stefano Mattoccia