34876 - Digital Systems Electronics M

Learning outcomes

The course aims to illustrate the modern design methodologies of VLSI circuits in CMOS technology, with reference to both circuit architectures which embody the most important logic and arithmetic functions, and computer-aided design techniques at different abstraction levels. The course is integrated with the module of “Digital System Electronics Laboratory”.

Course contents

Goal of the course is to familiarize students with the designing and optimizing CMOS IC digital circuits with respect to different quality metrics: cost, speed, reliability, and power dissipation.

The main topics are CMOS logic families and sequential circuits, interconnect, arithmetic buildings blocks, programmable logic arrays, and design methodologies.

• Technology scaling and Mos transistor  I/V transfer characteristic, IC manufacturing process, simplified CMOS process flow, trends in process technology.

• CMOS combinational logic gates, latches and registers: FCMOS (fully complementary CMOS) static combinational logic gates (propagation delay, static and dynamic power consumption), sizing of transistors for minimization of the propagation delay in a chain a logic gates, CMOS static latches and registers, characterization of logic and sequential cells for logic simulation and synthesis tools, impact of technology scaling.

• Interconnect: electrical wire models (lumped C and RC models, distributed RC line), design of buffers and repeaters, impact of technology scaling.

• Arithmetic buildings blocks: serial adder, architecture and performance of parallel adders (ripple carry, carry-select, carry-skip, logarithmic look-ahead), serial multiplier, architecture and performance of parallel multipliers.

• Implementation strategies for digital IC: full-custom and semi-custom design approaches, cell-based design methodology (standard cells and macro cells), array-based implementation methodology. Design flow of semi-custom IC design. Hardware description language: VHDL. Logic simulation and synthesis.

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Office hours

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