17921 - Computer Architecture L-A

Learning outcomes

Knowledge of the basic elements of computer architectures.

Course contents

1. Von Neumann Model, Hardware Architecture, Performance Evaluation, History of Computers.

2. Elements of Logic Design: ALU, Driver, Tranceiver, Latches, D-Type Registers, Register File, RAM, EPROM.

3. Instruction Set Architecture:  Register-Register Architectures (DLX),  Memory –Register Architecture (IA16 e IA32).  

4. IA16 Assembly Language.

5. Structure of a sequential CPU:  Datapath and Control, the DLX Datapath, State Diagram of the DLX Controller.

6. Structure of a Pipelined CPU: the Pipelined DLX Datapath, Hazards in a Pipelined  Datapath, Stalls and  Forwarding.

7. Mapping Memory and I/O Devices into the CPU Addressing Space, Address Decoding Simplified Decoding, Decoders and PAL.

8. Design of Simple Systems based on IA16 CPUs: Bus Cycles, Ready, Wait States.

9. The I/O Subsystem: polling ed interrupt.

10. Serial and Parallel I/O Devices. 

 

Readings/Bibliography

Suggested Readings:

 

1. Hennessy, Patterson: "Computer architecture: a quantitative approach" - Morgan Kaufmann pub. Inc., second edition

2. Giacomo Bucci: “Architetture dei calcolatori elettronici” McGraw-Hill.

Teaching methods

Theory and Exercises during Class Hours.

Assessment methods

Written Examination.

Teaching tools

PC and Projector.

Links to further information

http://didattica.arces.unibo.it/index.php?dbName=ldistefano

Office hours

See the website of Luigi Di Stefano