O'Neill A.; Agaiby R.; Olsen S.; Yang Y.; Hellstrom; P. -E.; Ostling M.; Oehme M.; Lyutovich K.; Kasper E.; Eneman G.; Verheyen P.; Loo R.; Claeys C.; Fiegna C.; Sangiorgi E., Reduced self-heating by strained silicon substrate engineering, «APPLIED SURFACE SCIENCE», 2008, 254, pp. 6182 - 6185 [articolo]
D.j Siprak; N. Zanolla; M. Tiebout; P. Baumgartner; C. Fiegna, Reduction of Low-Frequency Noise in MOSFETs Under Switched Gate and Substrate Bias, in: Proceedings European Solid State Device Research Confernece (ESSDERC) 2008, EDIMBURGO, s.n, 2008, pp. 366 - 369 (atti di: European Solid State Device Research Confernece (ESSDERC) 2008, Ediburgo, 15 - 19 Settembre 2008) [Contributo in Atti di convegno]
M. Braccioli; G. Curatola; Y. Yang; E. Sangiorgi; C. Fiegna, Simulation of self-heating effects in 30 nm gate length FinFET, in: Proceedings of the 9th International Conference on Ultimate Integration on Silicon, PISCATAWAY, NJ 08855-1331, IEEE, 2008, pp. 71 - 74 (atti di: 9th International Conference on Ultimate Integration on Silicon - ULIS 2008, Udine, 13-14 marzo 2008) [Contributo in Atti di convegno]
S. Markov; P. V. Sushko; S. Roy; C. Fiegna; E. Sangiorgi; A. L. Shluger; A. Asenov, Si–SiO2 interface band-gap transition – effects on MOS inversion layer, «PHYSICA STATUS SOLIDI. A, APPLICATIONS AND MATERIALS SCIENCE», 2008, 205, pp. 1290 - 1295 [articolo]
N. Zanolla; D. Siprak; M. Tiebout; P. Baumgartner; E. Sangiorgi; C. Fiegna., The impact of substrate bias on RTS and flicker noise in MOSFETs operating under switched gate bias, in: Proceedings of Intl. Conference on Solid State and Integrated Circuits Technology, PISCATAWAY N.J., IEEE, 2008, pp. 80 - 83 (atti di: International Conference on Solid State and Integrated Circuits Technology, Beijing, China, 21-23 October 2008) [Contributo in Atti di convegno]
E. Sangiorgi; P. Palestri; D. Esseni; C. Fiegna; L. Selmi, The Monte Carlo approach to transport modeling in deca-nanometer MOSFETs, «SOLID-STATE ELECTRONICS», 2008, 52, pp. 1414 - 1423 [articolo]
N. Barin; M. Braccioli; C. Fiegna; E. Sangiorgi, Analysis of Scaling Strategies for Sub-30 nm Double-Gate SOI N-MOSFETs, «IEEE TRANSACTIONS ON NANOTECHNOLOGY», 2007, 6, pp. 421 - 430 [articolo]
S. Markov ; N. Barin; C. Fiegna; S. Roy; E. Sangiorgi; A. Asenov, Analysis of Silicon Dioxide Interface Transition Region in MOS Structures, in: Simulation of Semiconductor Processes and Devices, WIEN NEW YORK, Springer Verlag, 2007, pp. 149 - 152 (atti di: 12th International Conference on Simulation of Semiconductor Processes and Devices, Vienna, 25 - 27 settembre 2007) [Contributo in Atti di convegno]
P. Palestri; N. Barin; D. Brunel; C. Busseret; A. Campera; P. A. Childs; F. Driussi; C. Fiegna; G. Fiori; R. Gusmeroli; G. Iannaccone; M. Karner; H. Kosina; A. L. Lacaita; E. Langer; B. Majkusiak; C. Monzio Compagnoni; A. Poncet; E. Sangiorgi; L. Selmi; A. S. Spinelli; J. Walczak, Comparison of Modeling Approaches for the Capacitance–Voltage and Current–Voltage Characteristics of Advanced Gate Stacks, «IEEE TRANSACTIONS ON ELECTRON DEVICES», 2007, 54, pp. 106 - 114 [articolo]
C. Fiegna; M. Braccioli; S. C. Brugger; F. M. Bufler; P. Dollfus; V. Aubry-Fortuna; C. Jungemann; B. Meinerzhagen; P. Palestri; S. Galdin-Retailleau; E. Sangiorgi; A. Schenk; L. Selmi, Comparison of Monte Carlo Transport Models for Nanometer-Size MOSFETs, in: Simulation of Semiconductor Processes and Devices 2007, WIEN NEW YORK, Springer Verlag, 2007, pp. 57 - 60 (atti di: 12th International Conference on Simulation of Semiconductor -processes and Devices (SISPAD 2007), Vienna Austria, 24 - 27 Settembre 2007) [Contributo in Atti di convegno]
N. Barin; C. Fiegna; E. Sangiorgi, International Journal of High Speed Electronics and Systems, «INTERNATIONAL JOURNAL OF HIGH SPEED ELECTRONICS AND SYSTEMS», 2007, 16, pp. 105 - 114 [articolo]
N. Barin; P. Palestri; C. Fiegna, Monte Carlo analysis of signal propagation delay and AC performance of decananometric bulk and double-gate MOSFETs., «SOLID-STATE ELECTRONICS», 2007, 51, pp. 604 - 610 [articolo]
E. Sangiorgi; P. Palestri; D. Esseni; C. Fiegna; L. Selmi, Monte Carlo modeling of nanometer scale MOSFETs, in: Proceedings of the XIV International Workshop on the Physics of Semiconductor Devices: IWPSD 2007, MUMBAI, Sine nomine, 2007, pp. 68 - 73 (atti di: XIV International Workshop on the Physics of Semiconductor Devices: IWPSD 2007, Mumbai India, 16-20 December 2007) [Contributo in Atti di convegno]
M. Braccioli; P. Palestri; T. Poiroux; M. Vinet; G. Le Carval; M. Mouis; C. Fiegna; E. Sangiorgi, Monte Carlo simulation of MOSFETs with band-offsets in the source and drain, in: Proceedings of the 8th Conference on Ultimate Integration on Silicon, S. L., S. N., 2007, pp. 39 - 42 (atti di: ULIS 2007, Leuven, Belgium, 15, 16 March 2007) [Contributo in Atti di convegno]
I. Riolino; M. Braccioli; L. Lucci; P. Palestri; D. Esseni; C. Fiegna; L. Selmi, Monte-Carlo simulation of decananometric nMOSFETs: Multi-subband vs. 3D-electron gas with quantum corrections, «SOLID-STATE ELECTRONICS», 2007, 51, pp. 1558 - 1564 [articolo]
