D. Siprak; .M. Tiebout; N. Zanolla; P. Baumgartner; C. Fiegna, Noise Reduction in CMOS Circuits Through Switched Gate and Forward Substrate Bias, «IEEE JOURNAL OF SOLID-STATE CIRCUITS», 2009, 44, pp. 1959 - 1967 [articolo]
C. Berti; S. Furini; S. Cavalcanti; E. Sangiorgi; C. Fiegna, Particle-based Simulation of Conductance of Solid State Nanopores and Ion Channels, in: Proceedings SISPAD 2009, SAN DIEGO, s.l., 2009, pp. 301 - 304 (atti di: SISPAD 2009, San Diego Ca, USA, 9-11 Settembre 2009) [Contributo in Atti di convegno]
M. Braccioli; G. Curatola; Y. Yang; E. Sangiorgi; C. Fiegna, Simulation of Self-Heating Effects in Different SOI MOS Architectures, «SOLID-STATE ELECTRONICS», 2009, 53, pp. 445 - 451 [articolo]
N. Zanolla; D. Siprak; M. Tiebout; P. Baumgartner; E. Sangiorgi; C. Fiegna, Suppression of Random Telegraph Signal Noise in small-area MOSFETs under switched gate and substrate bias conditions, in: Noise and Fluctuations, 20th International Conference, s.l, American Institute of Physics, 2009, pp. 201 - 204 (atti di: 20th International Conference on Noise and Fluctuations, Pisa, Italy, 14-19 Giugno 2009) [Contributo in Atti di convegno]
Claudio Fiegna; Yang Yang; Enrico Sangiorgi; Anthony G. O’Neill, Analysis of Self-Heating Effects in Ultrathin-Body SOI MOSFETs by Device Simulation, «IEEE TRANSACTIONS ON ELECTRON DEVICES», 2008, 55, pp. 233 - 244 [articolo]
M. Braccioli; C. Fiegna; E. Sangiorgi, Comparative analysis of self-heating in different SOI architectures, in: EuroSOI 2008 Proceedings, SINE LOCO, sine nomine, 2008, pp. 31 - 32 (atti di: EuroSOI 2008, Cork, Irlanda, Gennaio 23-25 2008) [Contributo in Atti di convegno]
N. Zanolla; D. Siprak; P. Baumgartner; E. Sangiorgi; C. Fiegna, Measurement and simulation of gate voltage dependence of RTS emission and capture time constants in MOSFETs, in: Proceedings of the 9th International Conference on Ultimate integration on Silicon, PISCATAWAY, NJ 08855-1331, IEEE, 2008, pp. 137 - 140 (atti di: 9th International Conference on Ultimate integration on Silicon - ULIS 2008, Udine, 13-14 marzo 2008) [Contributo in Atti di convegno]
M. Braccioli; P. Palestri; M. Mouis ; T. Poiroux; M. Vinet; G. Le Carval;
C. Fiegna; E. Sangiorgi; S. Deleonibus, Monte-Carlo simulation of MOSFETs with band offsets in the source and drain, «SOLID-STATE ELECTRONICS», 2008, 52, pp. 506 - 513 [articolo]
S. Markov; S. Roy; C. Fiegna; E. Sangiorgi; A. Asenov, On the sub-nm EOT scaling of high-K gate stacks, in: Proceedings of the 9th Internationla Conference on Ultimate Integration on Silicon, PISKATAWAY, NJ 08855-1331, IEEE, 2008, pp. 99 - 102 (atti di: 9th Internationla Conference on Ultimate Integration on Silicon, Udine, 13-14 Marzo 2008) [Contributo in Atti di convegno]
O'Neill A.; Agaiby R.; Olsen S.; Yang Y.; Hellstrom; P. -E.; Ostling M.; Oehme M.; Lyutovich K.; Kasper E.; Eneman G.; Verheyen P.; Loo R.; Claeys C.; Fiegna C.; Sangiorgi E., Reduced self-heating by strained silicon substrate engineering, «APPLIED SURFACE SCIENCE», 2008, 254, pp. 6182 - 6185 [articolo]
D.j Siprak; N. Zanolla; M. Tiebout; P. Baumgartner; C. Fiegna, Reduction of Low-Frequency Noise in MOSFETs Under Switched Gate and Substrate Bias, in: Proceedings European Solid State Device Research Confernece (ESSDERC) 2008, EDIMBURGO, s.n, 2008, pp. 366 - 369 (atti di: European Solid State Device Research Confernece (ESSDERC) 2008, Ediburgo, 15 - 19 Settembre 2008) [Contributo in Atti di convegno]
M. Braccioli; G. Curatola; Y. Yang; E. Sangiorgi; C. Fiegna, Simulation of self-heating effects in 30 nm gate length FinFET, in: Proceedings of the 9th International Conference on Ultimate Integration on Silicon, PISCATAWAY, NJ 08855-1331, IEEE, 2008, pp. 71 - 74 (atti di: 9th International Conference on Ultimate Integration on Silicon - ULIS 2008, Udine, 13-14 marzo 2008) [Contributo in Atti di convegno]
S. Markov; P. V. Sushko; S. Roy; C. Fiegna; E. Sangiorgi; A. L. Shluger; A. Asenov, Si–SiO2 interface band-gap transition – effects on MOS inversion layer, «PHYSICA STATUS SOLIDI. A, APPLICATIONS AND MATERIALS SCIENCE», 2008, 205, pp. 1290 - 1295 [articolo]
N. Zanolla; D. Siprak; M. Tiebout; P. Baumgartner; E. Sangiorgi; C. Fiegna., The impact of substrate bias on RTS and flicker noise in MOSFETs operating under switched gate bias, in: Proceedings of Intl. Conference on Solid State and Integrated Circuits Technology, PISCATAWAY N.J., IEEE, 2008, pp. 80 - 83 (atti di: International Conference on Solid State and Integrated Circuits Technology, Beijing, China, 21-23 October 2008) [Contributo in Atti di convegno]
E. Sangiorgi; P. Palestri; D. Esseni; C. Fiegna; L. Selmi, The Monte Carlo approach to transport modeling in deca-nanometer MOSFETs, «SOLID-STATE ELECTRONICS», 2008, 52, pp. 1414 - 1423 [articolo]
