Pullini, Antonio; Rossi, Davide; Loi, Igor; Di Mauro, Alfio; Benini, Luca, Mr. Wolf: A 1 GFLOP/s Energy-Proportional Parallel Ultra Low Power SoC for IOT Edge Processing, in: ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference, Institute of Electrical and Electronics Engineers Inc., 2018, pp. 130 - 133 (atti di: 44th IEEE European Solid State Circuits Conference, ESSCIRC 2018, Dresden, 2018) [Contribution to conference proceedings]
Meloni, Paolo; Capotondi, Alessandro; Deriu, Gianfranco; Brian, Michele; Conti, Francesco; Rossi, Davide; Raffo, Luigi; Benini, Luca, NEURAghe: Exploiting CPU-FPGA synergies for efficient and flexible CNN inference acceleration on zynQ SoCs, «ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS», 2018, 11, Article number: 18 , pp. 1 - 24 [Scientific article]Open Access
Azarkhish, Erfan*; Rossi, Davide; Loi, Igor; Benini, Luca, Neurostream: Scalable and Energy Efficient Deep Learning with Smart Memory Cubes, «IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS», 2018, 29, Article number: 8038819 , pp. 420 - 434 [Scientific article]Open Access
Fabio Montagna, Abbas Rahimi, Simone Benatti, Davide Rossi, Luca Benini, PULP-HD: Accelerating brain-inspired high-dimensional computing on a parallel ultra-low power platform, in: PROCEEDINGS OF THE 2018 55TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC), NEW YORK, IEEE, 2018, pp. 1 - 6 (atti di: 55th Annual Design Automation Conference, DAC 2018, San Francisco, CA - USA, JUN 24-28, 2018) [Contribution to conference proceedings]Open Access
Nouri, Sajjad*; Rossi, Davide; Nurmi, Jari, Power mitigation of a heterogeneous multicore architecture on FPGA/ASIC by DFS/DVFS techniques, «MICROPROCESSORS AND MICROSYSTEMS», 2018, 63, pp. 259 - 268 [Scientific article]
Schiavone P.D.; Rossi D.; Pullini A.; Di Mauro A.; Conti F.; Benini L., Quentin: an ultra-low-power PULPissimo SoC in 22nm FDX, in: 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018, Institute of Electrical and Electronics Engineers Inc., 2018, pp. 1 - 3 (atti di: 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018, Hyatt Regency, San Francisco Airport, usa, 2018) [Contribution to conference proceedings]
Martino, Dazzi; Pierpaolo, Palestri; Davide, Rossi; Andrea, Bandizioly; Igor, Loi; David, Bellasi; Luca, Benini, Sub-mW multi-Gbps chip-to-chip communication Links for Ultra-Low Power IoT end-nodes, in: Sub-mW multi-Gbps chip-to-chip communication Links for Ultra-Low Power IoT end-nodes, 2018, pp. 1 - 4 (atti di: IEEE ISCAS 2018, Firenze, May 27, 2018 – May 30, 2018) [Contribution to conference proceedings]
Tagliavini, Giuseppe; Rossi, Davide; Marongiu, Andrea; Benini, Luca, Synergistic HW/SW Approximation Techniques for Ultralow-Power Parallel Computing, «IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS», 2018, 37, pp. 982 - 995 [Scientific article]Open Access
Loi, Igor; Capotondi, Alessandro; Rossi, Davide; Marongiu, Andrea; Benini, Luca, The Quest for Energy-Efficient I$ Design in Ultra-Low-Power Clustered Many-Cores, «IEEE TRANSACTIONS ON MULTI-SCALE COMPUTING SYSTEMS», 2018, 4, pp. 99 - 112 [Scientific article]Open Access
Andri, Renzo; Cavigelli, Lukas; Rossi, Davide; Benini, Luca, YodaNN: An Architecture for Ultralow Power Binary-Weight CNN Acceleration, «IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS», 2018, 37, pp. 48 - 60 [Scientific article]Open Access
Das, Satyajit; Rossi, Davide; Martin Kevin, J. M.; Coussy, Philippe; Benini, Luca, A 142MOPS/mW integrated programmable array accelerator for smart visual processing, in: Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), IEEE, 2017, pp. 1 - 4 (atti di: IEEE International Symposium on Circuits and Systems (ISCAS), Baltimore, MD, USA, May 28-31, 2017) [Contribution to conference proceedings]
Rossi, Davide; Loi, Igor; Pullini, Antonio; Muller, Christoph; Burg, Andreas; Conti, Francesco; Benini, Luca; Flatresse, Philippe, A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors, «IEEE DESIGN & TEST», 2017, 34, pp. 46 - 53 [Scientific article]
Rusci, Manuele; Rossi, Davide; Farella, Elisabetta; Benini, Luca, A Sub-mW IoT-Endnode for Always-On Visual Monitoring and Smart Triggering, «IEEE INTERNET OF THINGS JOURNAL», 2017, 4, Article number: 7990119 , pp. 1284 - 1295 [Scientific article]
Montagna, Fabio; Buiatti, Marco; Benatti, Simone; Rossi, Davide; Farella, Elisabetta; Benini, Luca, A machine learning approach for automated wide-range frequency tagging analysis in embedded neuromonitoring systems, «METHODS», 2017, 129, pp. 96 - 107 [Scientific article]Open Access
Kartsch, V.; Benatti, S.; Rossi, D.; Benini, L., A wearable EEG-based drowsiness detection system with blink duration and alpha waves analysis, in: 2017 8TH INTERNATIONAL IEEE/EMBS CONFERENCE ON NEURAL ENGINEERING (NER), Piscataway, NJ, The Institute of Electrical and Electronics Engineers, 2017, pp. 251 - 254 (atti di: 8th International IEEE EMBS Conference on Neural Engineering, NER 2017, Regal International East Asia Hotel, Shanghai, China, 25-28 May 2017) [Contribution to conference proceedings]Open Access
