Pullini, Antonio; Conti, Francesco; Rossi, Davide; Loi, Igor; Gautschi, Michael; Benini, Luca, A Heterogeneous Multi-Core System-on-Chip for Energy Efficient Brain Inspired Computing, «IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS», 2018, 65, pp. 1094 - 1098 [Scientific article]Open Access
Victor Javier, Kartsch; Benatti, Simone; Schiavone, Pasquale Davide; Rossi, Davide; Benini, Luca, A sensor fusion approach for drowsiness detection in wearable ultra-low-power systems, «INFORMATION FUSION», 2018, 43, pp. 66 - 76 [Scientific article]Open Access
Mach, Stefan; Rossi, Davide; Tagliavini, Giuseppe; Marongiu, Andrea; Benini, Luca, A Transprecision Floating-Point Architecture for Energy-Efficient Embedded Computing, in: 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Institute of Electrical and Electronics Engineers Inc., 2018, pp. 1 - 5 (atti di: 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018, Firenze (Italy), 27–30 May 2018) [Contribution to conference proceedings]Open Access
Giuseppe, Tagliavini; Stefan, Mach; Davide, Rossi; Andrea, Marongiu; Luca, Benini, A Transprecision Floating-Point Platform for Ultra-Low Power Computing, in: Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition (DATE), IEEE, 2018, pp. 1051 - 1056 (atti di: Design, Automation and Test in Europe (DATE), Dresden, Germany, 19-23 Marzo 2018) [Contribution to conference proceedings]Open Access
Rusci, Manuele; Rossi, Davide; Flamand, Eric; Gottardi, Massimo; Farella, Elisabetta; Benini, Luca, Always-ON visual node with a hardware-software event-based binarized neural network inference engine, in: 2018 ACM International Conference on Computing Frontiers, CF 2018 - Proceedings, New York, USA, Association for Computing Machinery, Inc, 2018, pp. 314 - 319 (atti di: 15th ACM International Conference on Computing Frontiers, CF 2018, Ischia, Italy, May 08-10, 2018) [Contribution to conference proceedings]Open Access
Zolfaghari, Hesam; Rossi, Davide; Nurmi, Jari, An Explicitly Parallel Architecture for Packet Parsing in Software Defined Networks, in: Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors, Institute of Electrical and Electronics Engineers Inc., 2018, 2018-, pp. 1 - 4 (atti di: 29th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2018, ita, 2018) [Contribution to conference proceedings]
Aghazadeh, Roghayeh; Montagna, Fabio; Benatti, Simone; Rossi, Davide; Frounchi, Javad, Compressed sensing based seizure detection for an ultra low power multi-core architecture, in: PROCEEDINGS 2018 INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING & SIMULATION (HPCS 2018), NEW YORK, NY 10017 USA, Institute of Electrical and Electronics Engineers Inc., 2018, pp. 492 - 495 (atti di: 2018 International Conference on High Performance Computing & Simulation (HPCS), Orléans, France, 16-20 July 2018) [Contribution to conference proceedings]Open Access
Pahlevan, Ali; Qureshi, Yasir Mahmood; Zapater, Marina; Bartolini, Andrea; Rossi, Davide; Benini, Luca; Atienza, David, Energy proportionality in near-threshold computing servers and cloud data centers: Consolidating or Not?, in: Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018, NEW YORK, NY 10017 USA, Institute of Electrical and Electronics Engineers Inc., 2018, 2018, pp. 147 - 152 (atti di: 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018, Dresden, GERMANY, MAR 19-23, 2018) [Contribution to conference proceedings]Open Access
E. Flamand; D. Rossi; F. Conti; I. Loi; A. Pullini; F. Rotenberg; L. Benini, GAP-8: A RISC-V SoC for AI at the Edge of the IoT, in: 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2018, pp. 1 - 4 (atti di: 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Milan, Italy, 10-12 July 2018) [Contribution to conference proceedings]
Andri, Renzo; Cavigelli, Lukas; Rossi, Davide; Benini, Luca, Hyperdrive: A systolically scalable binary-weight CNN Inference Engine for mW IoT End-Nodes, in: Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, IEEE Computer Society, 2018, 2018-, pp. 509 - 515 (atti di: 17th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2018, hkg, 2018) [Contribution to conference proceedings]
Mauro A.D.; Rossi D.; Pullini A.; Flatresse P.; Benini L., Independent body-biasing of P-N transistors in an 28nm UTBB FD-SOI ULP near-threshold multi-core cluster, in: 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018, Institute of Electrical and Electronics Engineers Inc., 2018, pp. 1 - 3 (atti di: 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018, Hyatt Regency, San Francisco Airport, usa, 2018) [Contribution to conference proceedings]
Di Mauro, Alfio; Rossi, Davide; Pullini, Antonio; Flatresse, Philippe; Benini, Luca, Live Demonstration: Body-Bias Based Performance Monitoring and Compensation for a Near-Threshold Multi-Core Cluster in 28nm FD-SOI Technology, in: Proceedings - IEEE International Symposium on Circuits and Systems, Institute of Electrical and Electronics Engineers Inc., 2018, 2018-, pp. 1 - 1 (atti di: 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018, ita, 2018) [Contribution to conference proceedings]
Zolfaghari H.; Rossi D.; Nurmi J., Low-latency packet parsing in software defined networks, in: 2018 IEEE Nordic Circuits and Systems Conference, NORCAS 2018: NORCHIP and International Symposium of System-on-Chip, SoC 2018 - Proceedings, Institute of Electrical and Electronics Engineers Inc., 2018, pp. 1 - 6 (atti di: 4th IEEE Nordic Circuits and Systems Conference, NORCAS 2018: NORCHIP and International Symposium of System-on-Chip, SoC 2018, est, 2018) [Contribution to conference proceedings]
Pullini, Antonio; Rossi, Davide; Loi, Igor; Di Mauro, Alfio; Benini, Luca, Mr. Wolf: A 1 GFLOP/s Energy-Proportional Parallel Ultra Low Power SoC for IOT Edge Processing, in: ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference, Institute of Electrical and Electronics Engineers Inc., 2018, pp. 130 - 133 (atti di: 44th IEEE European Solid State Circuits Conference, ESSCIRC 2018, Dresden, 2018) [Contribution to conference proceedings]
Meloni, Paolo; Capotondi, Alessandro; Deriu, Gianfranco; Brian, Michele; Conti, Francesco; Rossi, Davide; Raffo, Luigi; Benini, Luca, NEURAghe: Exploiting CPU-FPGA synergies for efficient and flexible CNN inference acceleration on zynQ SoCs, «ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS», 2018, 11, Article number: 18 , pp. 1 - 24 [Scientific article]Open Access
