Liang, C.; Ottaviano, A.; Benz, T.; Sinigaglia, M.; Benini, L.; Garofalo, A.; Rossi, D., A Gigabit, DMA-enhanced Open-Source Ethernet Controller for Mixed-Criticality Systems, in: Proceedings of the 21st ACM International Conference on Computing Frontiers 2024 Workshops and Special Sessions, CF 2024 Companion, Association for Computing Machinery, Inc, 2024, pp. 55 - 58 (atti di: 21st ACM International Conference on Computing Frontiers, CF 2024, Ischia, Italy, 7-9 May 2024) [Contributo in Atti di convegno]
Valente, Luca; Nadalini, Alessandro; Veeran, Asif Hussain Chiralil; Sinigaglia, Mattia; Sá, Bruno; Wistoff, Nils; Tortorella, Yvan; Benatti, Simone; Psiakis, Rafail; Kulmala, Ari; Mohammad, Baker; Pinto, Sandro; Palossi, Daniele; Benini, Luca; Rossi, Davide, A Heterogeneous RISC-V Based SoC for Secure Nano-UAV Navigation, «IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS», 2024, 71, Article number: 10423921, pp. 1 - 14 [articolo]Open Access
Tedeschi, Riccardo; Valente, Luca; Ottavi, Gianmarco; Zelioli, Enrico; Wistoff, Nils; Giacometti, Massimiliano; Basit Sajjad, Abdul; Benini, Luca; Rossi, Davide, Culsans: An Efficient Snoop-based Coherency Unit for the CVA6 Open Source RISC-V application processor, «WORKS IN PROGRESS IN EMBEDDED COMPUTING JOURNAL», 2024, 10, pp. 1 - 5 [articolo]Open Access
Conti, Francesco; Paulin, Gianna; Garofalo, Angelo; Rossi, Davide; Di Mauro, Alfio; Rutishauser, Georg; Ottavi, Gianmarco; Eggimann, Manuel; Okuhara, Hayate; Benini, Luca, Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2???8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing, «IEEE JOURNAL OF SOLID-STATE CIRCUITS», 2024, 59, Article number: 10269153, pp. 128 - 142 [articolo]Open Access
Paulin, G.; Scheffler, P.; Benz, T.; Cavalcante, M.; Fischer, T.; Eggimann, M.; Zhang, Y.; Wistoff, N.; Bertaccini, L.; Colagrande, L.; Ottavi, G.; Gurkaynak, F. K.; Rossi, D.; Benini, L., Occamy: A 432-Core 28.1 DP-GFLOP/s/W 83% FPU Utilization Dual-Chiplet, Dual-HBM2E RISC-V-Based Accelerator for Stencil and Sparse Linear Algebra Computations with 8-to-64-bit Floating-Point Support in 12nm FinFET, in: Digest of Technical Papers - Symposium on VLSI Technology, Institute of Electrical and Electronics Engineers Inc., 2024, pp. 1 - 2 (atti di: 2024 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2024, Honolulu, HI, USA, 16-20 June 2024) [Contributo in Atti di convegno]
Prasad, Arpan Suravi; Scherer, Moritz; Conti, Francesco; Rossi, Davide; Di Mauro, Alfio; Eggimann, Manuel; Gómez, Jorge Tomás; Li, Ziyun; Sarwar, Syed Shakib; Wang, Zhao; De Salvo, Barbara; Benini, Luca, Siracusa: A 16 nm Heterogenous RISC-V SoC for Extended Reality With At-MRAM Neural Engine, «IEEE JOURNAL OF SOLID-STATE CIRCUITS», 2024, 59, Article number: 10538116, pp. 2055 - 2069 [articolo]
Perotti, M.; Raeber, M.; Sinigaglia, M.; Cavalcante, M.; Rossi, D.; Benini, L., Spatzformer: An Efficient Reconfigurable Dual-Core RISC-V V Cluster for Mixed Scalar-Vector Workloads, in: Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors, 10662 LOS VAQUEROS CIRCLE, PO BOX 3014, LOS ALAMITOS, CA 90720-1264 USA, Institute of Electrical and Electronics Engineers Inc., 2024, pp. 172 - 173 (atti di: 35th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2024, Hong Kong, Hong Kong, 24-26 July 2024) [Contributo in Atti di convegno]
Valente, L.; Restuccia, F.; Rossi, D.; Kastner, R.; Benini, L., TOP: Towards Open & Predictable Heterogeneous SoCs, «IEEE TRANSACTIONS ON COMPUTERS», 2024, 73, pp. 2678 - 2692 [articolo]
Nadalini, A; Rutishauser, G; Burrello, A; Bruschi, N; Garofalo, A; Benini, L; Conti, F; Rossi, D, A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks, in: 2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 345 E 47TH ST, NEW YORK, NY 10017 USA, IEEE, «PROCEEDINGS IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI», 2023, pp. 145 - 150 (atti di: 2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Foz do Iguacu, Brazil, 2023) [Contributo in Atti di convegno]Open Access
Ottaviano, Alessandro; Balas, Robert; Bambini, Giovanni; Del Vecchio, Antonio; Ciani, Maicol; Rossi, Davide; Benini, Luca; Bartolini, Andrea, ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation, «INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING», 2023, ., pp. . - . [articolo]Open Access
Sa, B; Valente, L; Martins, J; Rossi, D; Benini, L; Pinto, S, CVA6 RISC-V Virtualization: Architecture, Microarchitecture, and Design Space Exploration, «IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS», 2023, 31, Article number: 10233226, pp. 1713 - 1726 [articolo]Open Access
Maicol Ciani; Stefano Bonato; Rafail Psiakis; Angelo Garofalo; Luca Valente; Suresh Sugumar; Alessandro Giusti; Davide Rossi; Daniele Palossi, Cyber Security aboard Micro Aerial Vehicles: An OpenTitan-based Visual Communication Use Case, in: Proceedings of 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 345 E 47TH ST, NEW YORK, NY 10017 USA, IEEE, 2023, pp. 1 - 5 (atti di: 2023 IEEE International Symposium on Circuits and Systems (ISCAS), Monterey, California, USA, 2023) [Contributo in Atti di convegno]Open Access
Gianmarco Ottavi; Angelo Garofalo; Giuseppe Tagliavini; Francesco Conti; Alfio Di Mauro; Luca Benini; Davide Rossi, Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode, «IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS», 2023, 70, pp. 2450 - 2463 [articolo]Open Access
Mattia Sinigaglia; Luca Bertaccini; Luca Valente; Angelo Garofalo; Simone Benatti; Luca Benini; Francesco Conti; Davide Rossi, ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays, in: Proceedings of 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 345 E 47TH ST, NEW YORK, NY 10017 USA, IEEE, 2023, pp. 1 - 5 (atti di: 2023 IEEE International Symposium on Circuits and Systems (ISCAS), Monterey, California, USA., 2023) [Contributo in Atti di convegno]
Bruschi, Nazareno; Tagliavini, Giuseppe; Garofalo, Angelo; Conti, Francesco; Boybat, Irem; Benini, Luca; Rossi, Davide, End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture, in: 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), New York, IEEE, 2023, pp. 1 - 6 (atti di: Design, Automation & Test in Europe Conference & Exhibition (DATE), Antwerp, Belgium, 17-19 April 2023) [Contributo in Atti di convegno]Open Access
