Gomez, Andres; Pinto, Christian; Bartolini, Andrea; Rossi, Davide; Benini, Luca; Fatemi, Hamed; Gyvez, Jose Pineda de, Reducing Energy Consumption in Microcontroller-Based Platforms with Low Design Margin Co-Processors, in: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015, 2015, pp. 269 - 272 (atti di: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015, Grenoble, 9-13 March 2015) [Contribution to conference proceedings]
Tagliavini, Giuseppe; Rossi, Davide; Benini, Luca; Marongiu, Andrea, Synergistic architecture and programming model support for approximate micropower computing, in: Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, IEEE Computer Society, 2015, 07-10-, pp. 280 - 285 (atti di: IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2015, Montpellier, France, 2015) [Contribution to conference proceedings]
Gautschi, Michael; Rossi, Davide; Benini, Luca, Customizing an open source processor to fit in an ultra-low power cluster with a shared L1 memory, in: Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, Association for Computing Machinery, 2014, pp. 87 - 88 (atti di: 24th Great Lakes Symposium on VLSI, GLSVLSI 2014, Houston, TX, usa, 2014) [Contribution to conference proceedings]
Rossi, Davide; Loi, Igor; Conti, Francesco.; Tagliavini, Giuseppe; Pullini, Antonio.; Marongiu, Andrea, Energy efficient parallel computing on the PULP platform with support for OpenMP, in: Proceedings of 2014 IEEE 28th Convention of Electrical & Electronics Engineers in Israel (IEEEI), IEEE, 2014, pp. 1 - 5 (atti di: 2014 IEEE 28th Convention of Electrical & Electronics Engineers in Israel (IEEEI), Eilat (Israele), 3-5 Dec. 2014) [Contribution to conference proceedings]
Conti, Francesco; Rossi, Davide; Pullini, Antonio; Loi, Igor; Benini, Luca, Energy-efficient vision on the PULP platform for ultra-low power parallel computing, in: IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation, Institute of Electrical and Electronics Engineers Inc., 2014, pp. 1 - 6 (atti di: 2014 IEEE Workshop on Signal Processing Systems, SiPS 2014, Queen's University Belfast, gbr, 2014) [Contribution to conference proceedings]
Bortolotti, Daniele; Bartolini, Andrea; Weis, Christian; Rossi, Davide; Benini, Luca, Hybrid memory architecture for voltage scaling in ultra-low power multi-core biomedical processors, in: Conference Design, Automation and Test in Europe (DATE), IEEE Publisher 2014, 2014, pp. 1 - 6 (atti di: 17th Design, Automation and Test in Europe, DATE 2014, Dresden; Germany, 24 March 2014 through 28 March 2014;) [Contribution to conference proceedings]
D. Rossi; C. Mucci; M. Pizzotti; L. Perugini; R. Canegallo; R. Guerrieri, Multicore Signal Processing Platform
With Heterogeneous Configurable
Hardware Accelerators, «IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS», 2014, 22, pp. 1990 - 2003 [Scientific article]
Rossi, Davide; Loi, Igor; Haugou, Germain; Benini, Luca, Ultra-low-latency lightweight dma for tightly coupled multi-core clusters, in: Proceedings of the 11th ACM Conference on Computing Frontiers, CF 2014, Association for Computing Machinery, 2014, pp. 1 - 10 (atti di: 11th ACM International Conference on Computing Frontiers, CF 2014, Cagliari, ita, 2014) [Contribution to conference proceedings]
Daniele Bortolotti;Davide Rossi;Andrea Bartolini;Luca Benini, A variation tolerant architecture for ultra low power multi-processor cluster, in: 2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2013 IEEE, 2013, pp. 32 - 38 (atti di: 2013 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2013, Karlsruhe; Germany, 9-11 September 2013) [Contribution to conference proceedings]
D. Rossi; C. Mucci; F. Campi; S. Spolzino; L. Vanzolini; H. Sahlbach; S. Whitty; R. Ernst; W. Putzke-Röming; R. Guerrieri, Application Space Exploration of a Heterogeneous
Run-Time Configurable Digital Signal Processor, «IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS», 2013, 21, Article number: 6156496 , pp. 193 - 205 [Scientific article]
Andrea Manuzzato; Fabio Campi; Davide Rossi; Valentino Liberali; Davide Pandini, Exploiting body biasing for leakage reduction: A case study, in: 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2013, pp. 133 - 138 (atti di: 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Natal, 5-7 Aug. 2013) [Contribution to conference proceedings]
A. Grasset; P. Millet; P. Bonnot; S. Yehia; W. Putzke-Roeming; F. Campi; A. Rosti; M. Huebner; N. S. Voros; D. Rossi, The MORPHEUS Heterogeneous Dynamically Reconfigurable Platform, «INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING», 2011, 39, pp. 328 - 356 [Scientific article]
D. Rossi; F. Campi; S. Spolzino; S. Pucillo; R. Guerrieri, A Heterogeneous Digital Signal Processor for Dynamically Reconfigurable Computing, «IEEE JOURNAL OF SOLID-STATE CIRCUITS», 2010, 45, n.8, pp. 1615 - 1626 [Scientific article]
C.Brunelli; F.Garzia; D.Rossi; J.Nurmi, A coarse-grain reconfigurable architecture for multimedia applications supporting subword and floating-point calculations, «JOURNAL OF SYSTEMS ARCHITECTURE», 2010, 56, pp. 38 - 47 [Scientific article]
D.Rossi; F.Campi; A.Deledda; S.Spolzino; S.Pucillo, A Heterogeneous Digital Signal Processor Implementation for Dynamically Reconfigurable Computing, in: Proceedings of IEEE Custom Integrated Circuit Conference, s.l, IEEE, 2009, pp. 641 - 644 (atti di: IEEE Custom Integrated Circuit Conference, San Jose, California, U.S.A., 13-16 Sept. 2009) [Contribution to conference proceedings]
