Belano, Andrea; Tortorella, Yvan; Garofalo, Angelo; Benini, Luca; Rossi, Davide; Conti, Francesco, A Flexible Template for Edge Generative AI With High-Accuracy Accelerated Softmax and GELU, «IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS», 2025, 15, pp. 200 - 216 [articolo]
Garofalo, Angelo; Ottaviano, Alessandro; Perotti, Matteo; Benz, Thomas; Tortorella, Yvan; Balas, Robert; Rogenmoser, Michael; Zhang, Chi; Bertaccini, Luca; Wistoff, Nils; Ciani, Maicol; Koenig, Cyril; Sinigaglia, Mattia; Valente, Luca; Scheffler, Paul; Eggimann, Manuel; Cavalcante, Matheus; Restuccia, Francesco; Biondi, Alessandro; Conti, Francesco; Gurkaynak, Frank K.; Rossi, Davide; Benini, Luca, A Reliable, Time-Predictable Heterogeneous SoC for AI-Enhanced Mixed-Criticality Edge Applications, «IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS», 2025, 72, Article number: 11087605, pp. 1 - 1 [articolo]
Silvano, Cristina; Ielmini, Daniele; Ferrandi, Fabrizio; Fiorin, Leandro; Curzel, Serena; Benini, Luca; Conti, Francesco; Garofalo, Angelo; Zambelli, Cristian; Calore, Enrico; Schifano, Sebastiano; Palesi, Maurizio; Ascia, Giuseppe; Patti, Davide; Petra, Nicola; De Caro, Davide; Lavagno, Luciano; Urso, Teodoro; Cardellini, Valeria; Cardarilli, Gian Carlo; Birke, Robert; Perri, Stefania, A Survey on Deep Learning Hardware Accelerators for Heterogeneous HPC Platforms, «ACM COMPUTING SURVEYS», 2025, 57, Article number: 286, pp. 1 - 39 [articolo]Open Access
Agosta, Giovanni; Cherubin, Stefano; Christ, Derek; Conti, Francesco; Djupdal, Asbjørn; Jung, Matthias; Keramidas, Georgios; Passerone, Roberto; Rech, Paolo; Ricci, Elisa; Velha, Philippe; Vella, Flavio; Yildirim, Kasim Sinan; Wilbert, Nils, Architecture, Simulation and Software Stack to Support Post-CMOS Accelerators: The ARCHYTAS Project, in: Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, 345 E 47TH ST, NEW YORK, NY 10017 USA, IEEE Computer Society, 2025, pp. 1 - 6 (atti di: 28th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2025, grc, 2025) [Contributo in Atti di convegno]
Bochem, Severin; Jung, Victor J. B.; Prasad, Arpan Suravi; Conti, Francesco; Benini, Luca, Distributed Inference with Minimal Off-Chip Traffic for Transformers on Low-Power MCUs, in: Proceedings -Design, Automation and Test in Europe, DATE, Institute of Electrical and Electronics Engineers Inc., «PROCEEDINGS - DESIGN, AUTOMATION, AND TEST IN EUROPE CONFERENCE AND EXHIBITION», 2025, pp. 1 - 7 (atti di: 2025 Design, Automation and Test in Europe Conference, DATE 2025, Lyon, fra, 31 March 2025 - 02 April 2025) [Contributo in Atti di convegno]
Zhang, Chi; Colagrande, Luca; Andri, Renzo; Benz, Thomas; Islamoglu, Gamze; Nadalini, Alessandro; Conti, Francesco; Li, Yawei; Benini, Luca, FlatAttention: Dataflow and Fabric Collectives Co-Optimization for Efficient Multi-Head Attention on Tile-Based Many-PE Accelerators, in: Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, 345 E 47TH ST, NEW YORK, NY 10017 USA, IEEE Computer Society, 2025, pp. 1 - 6 (atti di: 28th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2025, Kalamata, Greece, 06-09 July 2025) [Contributo in Atti di convegno]
Isachi, Victor; Nadalini, Alessandro; Gallotta, Riccardo Fiorani; Garofalo, Angelo; Conti, Francesco; Rossi, Davide, FractalSync: Lightweight Scalable Global Synchronization of Massive Bulk Synchronous Parallel AI Accelerators, in: Proceedings of the 22nd ACM International Conference on Computing Frontiers 2025, CF 2025, 1601 Broadway, 10th Floor, NEW YORK, NY, UNITED STATES, Association for Computing Machinery, Inc, 2025, 1, pp. 84 - 87 (atti di: 22nd ACM International Conference on Computing Frontiers 2025, CF 2025, ita, 2025) [Contributo in Atti di convegno]
Ghionda, Luigi; Tedeschi, Riccardo; Tortorella, Yvan; Prasad, Arpan Suravi; Rossi, Davide; Benini, Luca; Conti, Francesco, HMR-NEureka: Hybrid Modular Redundancy DNN Acceleration in Heterogeneous RISC-V SoCs, in: Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, 345 E 47TH ST, NEW YORK, NY 10017 USA, IEEE Computer Society, 2025, pp. 1 - 6 (atti di: 28th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2025, grc, 2025) [Contributo in Atti di convegno]
Daghero, Francesco; Jahier Pagliari, Daniele; Conti, Francesco; Benini, Luca; Poncino, Massimo; Burrello, Alessio, Lightweight Software Kernels and Hardware Extensions for Efficient Sparse Deep Neural Networks on Microcontrollers, in: Proceedings of Machine Learning and Systems, MLSys, 2025, 7, pp. 1 - 13 (atti di: Machine Learning and Systems, Santa Clara, USA, 12-15 maggio 2025) [Contributo in Atti di convegno]
Sinigaglia, Mattia; Kiamarzi, Amirhossein; Bertuletti, Marco; Ghionda, Luigi; Orlandi, Mattia; Tedeschi, Riccardo; Di Giampietro, Aurora; Tortorella, Yvan; Bertaccini, Luca; Benatti, Simone; Tagliavini, Giuseppe; Benini, Luca; Conti, Francesco; Rossi, Davide, Maestro: A 302 GFLOPS/W and 19.8GFLOPS RISC-V Vector-Tensor Architecture for Wearable Ultrasound Edge Computing, «IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS», 2025, 72, pp. 1 - 15 [articolo]
Nadalini, D.; Rusci, M.; Cereda, E.; Benini, L.; Conti, F.; Palossi, D., Multi-modal On-Device Learning for Monocular Depth Estimation on Ultra-low-power MCUs, «IEEE INTERNET OF THINGS JOURNAL», 2025, -, pp. 1 - 1 [articolo]
Pang, Hong; Cappetta, Carmine; Massa, Riccardo; Vasilopoulos, Athanasios; Ferro, Elena; Islamoglu, Gamze; Garofalo, Angelo; Conti, Francesco; Benini, Luca; Boybat, Irem; Boesch, Thomas, Multi-Mode Borderguard Controllers for Efficient On-Chip Communication in Heterogeneous Digital/Analog Neural Processing Units, in: Proceedings -Design, Automation and Test in Europe, DATE, Institute of Electrical and Electronics Engineers Inc., «PROCEEDINGS - DESIGN, AUTOMATION, AND TEST IN EUROPE CONFERENCE AND EXHIBITION», 2025, pp. 1 - 7 (atti di: 2025 Design, Automation and Test in Europe Conference, DATE 2025, Lyon, France, 31 March 2025 - 02 April 2025) [Contributo in Atti di convegno]
Silvano, Cristina; Ferrandi, Fabrizio; Curzel, Serena; Ielmini, Daniele; Perri, Stefania; Spagnolo, Fanny; Corsonello, Pasquale; Schifano, Sebastiano Fabio; Zambelli, Cristian; Garofalo, Angelo; Conti, Francesco; Benini, Luca, Multi-Partner Project: Architectures and Design Methodologies to Accelerate AI Workloads. The ICSC Flagship 2 Project, in: Proceedings -Design, Automation and Test in Europe, DATE, Institute of Electrical and Electronics Engineers Inc., «PROCEEDINGS - DESIGN, AUTOMATION, AND TEST IN EUROPE CONFERENCE AND EXHIBITION», 2025, pp. 1 - 7 (atti di: 2025 Design, Automation and Test in Europe Conference, DATE 2025, Lyon, France, 31 March 2025 - 02 April 2025) [Contributo in Atti di convegno]
İslamoğlu, Gamze; Bertaccini, Luca; Prasad, Arpan Suravi; Conti, Francesco; Garofalo, Angelo; Benini, Luca, MXDOTP: A RISC-V ISA Extension for Enabling Microscaling (MX) Floating-Point Dot Products, in: Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors, Institute of Electrical and Electronics Engineers Inc., 2025, pp. 81 - 84 (atti di: 36th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2025, can, 2025) [Contributo in Atti di convegno]
Conti, Francesco; Garofalo, Angelo; Rossi, Davide; Tagliavini, Giuseppe; Benini, Luca, Open Source Heterogeneous SoCs for Artificial Intelligence: The PULP Platform experience, «IEEE SOLID-STATE CIRCUITS MAGAZINE», 2025, 17, Article number: 11044967, pp. 49 - 60 [articolo]
