Foto del docente

Cecilia Metra

Full Professor

Department of Electrical, Electronic, and Information Engineering "Guglielmo Marconi"

Academic discipline: IINF-01/A Electronics

Publications

C. Metra; D. Rossi; M. Omaña; J.M. Cazeaux; TM Mak, Can Clock Faults Be Detected Through Functional Test ?, in: Proceeding of the 9th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, LOS ALAMITOS, B. Straube, O. Novak, 2006, 1, pp. 168 - 173 (atti di: 9th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS'06), Prague, Czech Republic, April 18-21, 2006) [Contribution to conference proceedings]

D. Rossi; M. Omaña; C. Metra; A. Pagni, Checker No-Harm Alarm Robustness, in: Proceedings 12th IEEE International On-Line Testing Symposium, LOS ALAMITOS, C. Metra, M. Nicolaidis, R. Aitken, R. Leveugle, 2006, 1, pp. 275 - 280 (atti di: 12th IEEE International On-Line Testing Symposium, Como, Italy, 10-12 July, 2006) [Contribution to conference proceedings]

M. Omaña; J.M. Cazeaux; D. Rossi; C. Metra, Low-Cost and Highly Reliable Detector for Transient and Crosstalk Faults Affecting FPGA Interconnects, in: Proceedings Design, Automation and Test in Europe Conference and Exhibition, LOS ALAMITOS, D. Sciuto, G. Gielen, 2006, 1, pp. 170 - 175 (atti di: Design, Automation and Test in Europe Conference and Exhibition (DATE 2006), Messe Munich, Germany, 6-10 March, 2006) [Contribution to conference proceedings]

C. Metra; M. Omaña; D. Rossi; J.M. Cazeaux; TM Mak, Path (Min) delay Faults and Their Impact on Self-Checking Circuits' Operation, in: Proceedings 12th IEEE International On-Line Testing Symposium, LOS ALAMITOS, C. Metra, M. Nicolaidis, R. Aitken, R. Leveugle, 2006, 1, pp. 17 - 22 (atti di: 12th IEEE International On-Line Testing Symposium, Como, Italy, 10-12 July, 2006) [Contribution to conference proceedings]

R. Leveugle; R. Aitken; C. Metra; M. Nicolaidis, Proceedings 12th IEEE International On-Line Testing Symposium, LOS ALAMITOS, IEEE, 2006, pp. v - 294 . [Editorship]

X. Ma; J. Huang; C. Metra; F. Lombardi, Testing Reversible 1D Arrays of Molecular QCA, in: Proceedings of 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, LOS ALAMITOS, N. Park, H. Ito, A. Salsano, N. Touba, 2006, 1, pp. 71 - 79 (atti di: 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, Washington DC, USA, 4-6 October, 2006) [Contribution to conference proceedings]

J. C. Lo; C. Metra; F. Lombardi, Transactions on Computers, LOS ALAMITOS, IEEE, 2006, pp. 145 (Special Issue on Design and Test of Systems-On-a-Chip (SOC)). [Editorship]

C. Metra; M. Nicolaidis; R. Leveugle; R. Aitken, Welcome, in: C. METRA M. NICOLAIDIS R. LEVEUGLE R. AITKEN, Proceeding 12th IEEE International On-Line Testing Symposium, LOS ALAMITOS, C. Metra, M. Nicolaidis, R. Leveugle, R. Aitken, 2006, pp. ix - ix [Brief introduction]

C. Metra; M. Nicolaidis; R. Leveugle; R. Aitken, 12th IEEE International On-Line Testing Symposium, 2006. [Exhibition]

A. K. Nieuwland; A. Katoch; D. Rossi; C. Metra, Coding Techniques for Low Switching Noise in Fault Tolerant Busses, in: Proceedings 11th International On-Line Testing Symposium, LOS ALAMITOS, C. Metra, K. Roy, L. Anghel, M. Nicolaidis, 2005, pp. 183 - 189 (atti di: 11th International On-Line Testing Symposium, Saint Raphael, Francia, 6-8 luglio 2005) [Contribution to conference proceedings]

D. Rossi; A. K. Nieuwland; A. Katoch; C. Metra, Exploiting ECC Redundancy to Minimize Crosstalk Impact, «IEEE DESIGN & TEST OF COMPUTERS», 2005, 22, pp. 59 - 70 [Scientific article]

C. Metra; R. Leveugle, Guest editorial, in: C. METRA R. LEVEUGLE, Journal of Electronic Testing, Special Issue on On-Line-Testing and Fault Tolerance, S.L., C. Metra, R. Leveugle, 2005, pp. 347 - 347 [Brief introduction]

C. Metra ; Regis Leveugle, Journal of Electronic Testing, S.L., C. Metra , Regis Leveugle, 2005, pp. 343 - 455 (Special Issue on Special Issue on On-Line-Testing and Fault Tolerance). [Editorship]

Y. Dhillon; A. Diril; A. Chatterjee; C. Metra, Load and Logic Co-Optimization for design of Soft-Error Resistant nanometer CMOS Circuits, in: Proceedings 11th International On-Line Testing Symposium, LOS ALAMITOS, C. Metra, K. Roy, L. Anghel, M. Nicolaidis, 2005, pp. 35 - 40 (atti di: 11th International On-Line Testing Symposium, Saint Raphael, Francia, 6-8 luglio 2005) [Contribution to conference proceedings]

M. Omaña; D. Rossi; C. Metra, Low Cost and High Speed Embedded Two-Rail Code Checker, «IEEE TRANSACTIONS ON COMPUTERS», 2005, 54, pp. 153 - 164 [Scientific article]