Foto del docente

Francesco Conti

Senior assistant professor (fixed-term)

Department of Electrical, Electronic, and Information Engineering "Guglielmo Marconi"

Academic discipline: ING-INF/01 Electronic Engineering

Publications

Niculescu V.; Lamberti L.; Conti F.; Benini L.; Palossi D., Improving Autonomous Nano-Drones Performance via Automated End-to-End Optimization and Deployment of DNNs, «IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS», 2021, 11, pp. 548 - 562 [Scientific article]

Risso M.; Burrello A.; Pagliari D.J.; Conti F.; Lamberti L.; MacIi E.; Benini L.; Poncino M., Pruning in Time (PIT): A Lightweight Network Architecture Optimizer for Temporal Convolutional Networks, in: Proceedings - Design Automation Conference, Institute of Electrical and Electronics Engineers Inc., 2021, 2021-, pp. 1015 - 1020 (atti di: 58th ACM/IEEE Design Automation Conference, DAC 2021, usa, 2021) [Contribution to conference proceedings]

Paulin G.; Andri R.; Conti F.; Benini L., RNN-Based Radio Resource Management on Multicore RISC-V Accelerator Architectures, «IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS», 2021, 29, pp. 1624 - 1637 [Scientific article]

Burrello A.; Dequino A.; Pagliari D.J.; Conti F.; Zanghieri M.; MacIi E.; Benini L.; Poncino M., TCN Mapping Optimization for Ultra-Low Power Time-Series Edge Inference, in: Proceedings of the International Symposium on Low Power Electronics and Design, 345 E 47TH ST, NEW YORK, NY 10017 USA, Institute of Electrical and Electronics Engineers Inc., 2021, 2021-, pp. 1 - 6 (atti di: 2021 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2021, usa, 2021) [Contribution to conference proceedings]

Bertaccini L.; Benini L.; Conti F., To buffer, or not to buffer? A case study on FFT accelerators for ultra-low-power multicore clusters, in: Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors, 10662 LOS VAQUEROS CIRCLE, PO BOX 3014, LOS ALAMITOS, CA 90720-1264 USA, Institute of Electrical and Electronics Engineers Inc., 2021, 2021-, pp. 1 - 8 (atti di: 32nd IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2021, usa, 2021) [Contribution to conference proceedings]

Garofalo A.; Tagliavini G.; Conti F.; Benini L.; Rossi D., XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Networks on RISC-V Based IoT End Nodes, «IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING», 2021, 9, pp. 1489 - 1505 [Scientific article]Open Access

Ottavi G.; Garofalo A.; Tagliavini G.; Conti F.; Benini L.; Rossi D., A mixed-precision RISC-V processor for extreme-edge DNN inference, in: Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, IEEE Computer Society, 2020, 2020-, pp. 512 - 517 (atti di: 19th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2020, Cyprus, 2020) [Contribution to conference proceedings]Open Access

Alfio Di Mauro, Francesco Conti, Pasquale Davide Schiavone, Davide Rossi, Luca Benini, Always-On 674μW@4GOP/s Error Resilient Binary Neural Networks With Aggressive SRAM Voltage Scaling on a 22-nm IoT End-Node, «IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS», 2020, 67, Article number: 9158513 , pp. 3905 - 3918 [Scientific article]

Nazareno Bruschi, Angelo Garofalo, Francesco Conti, Giuseppe Tagliavini, Davide Rossi, Enabling mixed-precision quantized neural networks in extreme-edge devices, in: 17th ACM International Conference on Computing Frontiers 2020, CF 2020 - Proceedings, New York, Association for Computing Machinery, Inc, 2020, pp. 217 - 220 (atti di: 17th ACM International Conference on Computing Frontiers, CF 2020, Catania (Italy), 11 Maggio 2020 - 13 Maggio 2020) [Contribution to conference proceedings]Open Access

Meloni, Paolo; Loi, Daniela; Deriu, Gianfranco; Carreras, Marco; Conti, Francesco; Capotondi, Alessandro; Rossi, Davide, Exploring NEURAGHE: A Customizable Template for APSoC-based CNN Inference at the Edge, «IEEE EMBEDDED SYSTEMS LETTERS», 2020, 12, pp. 62 - 65 [Scientific article]Open Access

Ravaglia L.; Rusci M.; Capotondi A.; Conti F.; Pellegrini L.; Lomonaco V.; Maltoni D.; Benini L., Memory-Latency-Accuracy Trade-Offs for Continual Learning on a RISC-V Extreme-Edge Node, in: IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation, Institute of Electrical and Electronics Engineers Inc., 2020, 2020-, pp. 1 - 6 (atti di: 34th IEEE Workshop on Signal Processing Systems, SiPS 2020, prt, 2020) [Contribution to conference proceedings]

Garofalo A.; Rusci M.; Conti F.; Rossi D.; Benini L., PULP-NN: Accelerating Quantized Neural Networks on Parallel Ultra-Low-Power RISC-V Processors, «PHILOSOPHICAL TRANSACTIONS OF THE ROYAL SOCIETY OF LONDON SERIES A: MATHEMATICAL PHYSICAL AND ENGINEERING SCIENCES», 2020, 378, Article number: 20190155 , pp. 1 - 22 [Scientific article]Open Access

Zanghieri, Marcello; Benatti, Simone; Burrello, Alessio; Kartsch, Victor; Conti, Francesco; Benini, Luca, Robust Real-Time Embedded EMG Recognition Framework Using Temporal Convolutional Networks on a Multicore IoT Processor, «IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS», 2020, 14, pp. 244 - 256 [Scientific article]Open Access

Zanghieri M.; Benatti S.; Conti F.; Burrello A.; Benini L., Temporal Variability Analysis in sEMG Hand Grasp Recognition using Temporal Convolutional Networks, in: Proceedings - 2020 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2020, Institute of Electrical and Electronics Engineers Inc., 2020, pp. 228 - 232 (atti di: 2020 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2020, ita, 2020) [Contribution to conference proceedings]

Garofalo, Angelo; Tagliavini, Giuseppe; Conti, Francesco; Rossi, Davide; Benini, Luca, XpulpNN: Accelerating Quantized Neural Networks on RISC-V Processors Through ISA Extensions, in: Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition (DATE), Institute of Electrical and Electronics Engineers Inc. (IEEE), 2020, pp. 186 - 191 (atti di: 23rd Design, Automation and Test in Europe Conference and Exhibition, DATE 2020, Grenoble, France, 9-13 March 2020) [Contribution to conference proceedings]

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