Foto del docente

Francesco Conti

Junior assistant professor (fixed-term)

Department of Electrical, Electronic, and Information Engineering "Guglielmo Marconi"

Academic discipline: ING-INF/01 Electronic Engineering

Publications

Pullini, Antonio; Conti, Francesco; Rossi, Davide; Loi, Igor; Gautschi, Michael; Benini, Luca, A Heterogeneous Multi-Core System-on-Chip for Energy Efficient Brain Inspired Computing, «IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS», 2018, 65, pp. 1094 - 1098 [Scientific article]Open Access

Meloni, P. and Loi, D. and Deriu, G. and Pimentel, A. D. and Sapra, D. and Moser, B. and Shepeleva, N. and Conti, F. and Benini, L. and Ripolles, O. and Solans, D. and Pintor, M. and Biggio, B. and Stefanov, T. and Minakova, S. and Fragoulis, N. and Theodorakopoulos, I. and Masin, M. and Palumbo, F., ALOHA: An Architectural-aware Framework for Deep Learning at the Edge, in: Proceedings of the Workshop on INTelligent Embedded Systems Architectures and Applications, ACM, 2018, pp. 19 - 26 (atti di: Workshop on INTelligent Embedded Systems Architectures and Applications, Torino, Italy, 2018) [Contribution to conference proceedings]

Conti, Francesco; Cavigelli, Lukas; Paulin, Gianna; Susmelj, Igor; Benini, Luca, Chipmunk: A systolically scalable 0.9 mm2, 3.08Gop/s/mW @ 1.2 mW accelerator for near-sensor recurrent neural network inference, in: 2018 IEEE Custom Integrated Circuits Conference, CICC 2018, Institute of Electrical and Electronics Engineers Inc., 2018, pp. 1 - 4 (atti di: 2018 IEEE Custom Integrated Circuits Conference, CICC 2018, San Diego, CA, USA, 8-11 April 2018) [Contribution to conference proceedings]Open Access

E. Flamand; D. Rossi; F. Conti; I. Loi; A. Pullini; F. Rotenberg; L. Benini, GAP-8: A RISC-V SoC for AI at the Edge of the IoT, in: 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2018, pp. 1 - 4 (atti di: 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP), Milan, Italy, 10-12 July 2018) [Contribution to conference proceedings]

Meloni, Paolo; Capotondi, Alessandro; Deriu, Gianfranco; Brian, Michele; Conti, Francesco; Rossi, Davide; Raffo, Luigi; Benini, Luca, NEURAghe: Exploiting CPU-FPGA synergies for efficient and flexible CNN inference acceleration on zynQ SoCs, «ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS», 2018, 11, pp. 1 - 24 [Scientific article]Open Access

Schiavone P.D.; Rossi D.; Pullini A.; Di Mauro A.; Conti F.; Benini L., Quentin: an ultra-low-power PULPissimo SoC in 22nm FDX, in: 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018, Institute of Electrical and Electronics Engineers Inc., 2018, pp. 1 - 3 (atti di: 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018, Hyatt Regency, San Francisco Airport, usa, 2018) [Contribution to conference proceedings]

Gomez, Andres and Conti, Francesco and Benini, Luca, Thermal Image-based CNN's for Ultra-low Power People Recognition, in: Proceedings of the 15th ACM International Conference on Computing Frontiers, ACM, 2018, pp. 326 - 331 (atti di: Low-Power Embedded Systems Workshop (LP-EMS) colocated with Computing Frontiers 2018, Ischia, Italy, May 2018) [Contribution to conference proceedings]

Rusci, Manuele; Capotondi, Alessandro; Conti, Francesco; Benini, Luca, Work-in-Progress: Quantized NNs as the Definitive solution for inference on low-power ARM MCUs?, in: 2018 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Institute of Electrical and Electronics Engineers Inc., 2018, pp. 1 - 2 (atti di: 2018 ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis CODES+ISSS 2018, Torino Incontra Congress Center, Torino, Italia, September 30 – October 5, 2018) [Contribution to conference proceedings]Open Access

Conti, Francesco; Schiavone, Pasquale Davide; Benini, Luca, XNOR Neural Engine: A Hardware Accelerator IP for 21.6-fJ/op Binary Neural Network Inference, «IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS», 2018, 37, pp. 2940 - 2951 [Scientific article]

Rossi, Davide; Loi, Igor; Pullini, Antonio; Muller, Christoph; Burg, Andreas; Conti, Francesco; Benini, Luca; Flatresse, Philippe, A Self-Aware Architecture for PVT Compensation and Power Nap in Near Threshold Processors, «IEEE DESIGN & TEST», 2017, 34, pp. 46 - 53 [Scientific article]

Conti, Francesco; Palossi, Daniele; Andri, Renzo; Magno, Michele; Benini, Luca, Accelerated Visual Context Classification on a Low-Power Smartwatch, «IEEE TRANSACTIONS ON HUMAN-MACHINE SYSTEMS», 2017, 47, pp. 19 - 30 [Scientific article]Open Access

Conti, Francesco; Schilling, Robert; Schiavone, Pasquale Davide; Pullini, Antonio; Rossi, Davide; Gurkaynak, Frank Kagan; Muehlberghuber, Michael; Gautschi, Michael; Loi, Igor; Haugou, Germain; Mangard, Stefan; Benini, Luca, An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics, «IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS», 2017, 64, pp. 2481 - 2494 [Scientific article]Open Access

Di Mauro, Alfio; Conti, Francesco; Benini, Luca, An Ultra-Low Power Address-Event Sensor Interface for Energy-Proportional Time-To-Information Extraction, in: Proceedings - Design Automation Conference, Institute of Electrical and Electronics Engineers Inc., 2017, 128280, pp. 1 - 6 (atti di: 54th Annual Design Automation Conference, DAC 2017, usa, 2017) [Contribution to conference proceedings]

Gã¼rkaynak, Frank K.; Schilling, Robert; Muehlberghuber, Michael; Conti, Francesco; Mangard, Stefan; Benini, Luca, Multi-core data analytics SoC with a flexible 1.76 Gbit/s AES-XTS cryptographic accelerator in 65 nm CMOS, in: ACM International Conference Proceeding Series, Association for Computing Machinery, 2017, pp. 19 - 24 (atti di: 4th Workshop on Cryptography and Security in Computing Systems, CS2 2017, swe, 2017) [Contribution to conference proceedings]

Davide Schiavone, Pasquale; Conti, Francesco; Rossi, Davide; Gautschi, Michael; Pullini, Antonio; Flamand, Eric; Benini, Luca, Slow and steady wins the race? A comparison of ultra-low-power RISC-V cores for Internet-of-Things applications, in: Proceedings of 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2017, pp. 1 - 8 (atti di: 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), Thessaloniki, Greece, Greece, 25-27 September 2017) [Contribution to conference proceedings]

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