Chen J.; Loi I.; Flamand E.; Tagliavini G.; Benini L.; Rossi D., Scalable Hierarchical Instruction Cache for Ultralow-Power Processors Clusters, «IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS», 2023, 31, Article number: 10048762 , pp. 456 - 469 [Scientific article]Open Access
Valente, L.; Veeran, A.; Sinigaglia, M.; Tortorella, Y.; Nadalini, A.; Wistoff, N.; Sá, B.; Garofalo, A.; Psiakis, R.; Tolba, M.; Kulmala, A.; Limaye, N.; Sinanoglu, O.; Pinto, S.; Palossi, D.; Benini, L.; Mohammad, B.; Rossi, D., Shaheen: An Open, Secure, and Scalable RV64 SoC for Autonomous Nano-UAVs, in: Proceedings of the 2023 IEEE Hot Chips 35 Symposium (HCS), 2023(atti di: Hot Chips 35 Symposium, Stanford, 27/08/2023) [Poster]
Scherer, M; Eggimann, M; Di Mauro, A; Prasad, AS; Conti, F; Rossi, D; Gómez, JT; Li, ZY; Sarwar, SS; Wang, Z; De Salvo, B; Benini, L, Siracusa: A Low-Power On-Sensor RISC-V SoC for Extended Reality Visual Processing in 16nm CMOS, in: ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC), 345 E 47TH ST, NEW YORK, NY 10017 USA, IEEE, 2023, pp. 217 - 220 (atti di: ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC), Lisbon, Portugal, 2023) [Contribution to conference proceedings]
Mirsalari, Seyed Ahmad; Tagliavini, Giuseppe; Rossi, Davide; Benini, Luca, TransLib: A Library to Explore Transprecision Floating-Point Arithmetic on Multi-Core IoT End-Nodes, in: 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2023, pp. 1 - 2 (atti di: Design, Automation & Test in Europe Conference & Exhibition (DATE), Antwerp, Belgium, 17-19 April 2023) [Abstract]
Conti, Francesco; Rossi, Davide; Paulin, Gianna; Garofalo, Angelo; Di Mauro, Alfio; Rutishauer, Georg; Ottavi, Gian marco; Eggimann, Manuel; Okuhara, Hayate; Huard, Vincent; Montfort, Olivier; Jure, Lionel; Exibard, Nils; Gouedo, Pascal; Louvat, Mathieu; Botte, Emmanuel; Benini, Luca, 22.1 A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing, in: 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, pp. 21 - 23 (atti di: 2023 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, 2023) [Contribution to conference proceedings]
Garofalo, A; Ottavi, G; Conti, F; Karunaratne, G; Boybat, I; Benini, L; Rossi, D, A Heterogeneous In-Memory Computing Cluster for Flexible End-to-End Inference of Real-World Deep Neural Networks, «IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS», 2022, 12, pp. 422 - 435 [Scientific article]Open Access
Montagna F.; Mach S.; Benatti S.; Garofalo A.; Ottavi G.; Benini L.; Rossi D.; Tagliavini G., A Low-Power Transprecision Floating-Point Cluster for Efficient Near-Sensor Data Analytics, «IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS», 2022, 33, pp. 1038 - 1053 [Scientific article]Open Access
Ottaviano A.; Balas R.; Bambini G.; Bonfanti C.; Benatti S.; Rossi D.; Benini L.; Bartolini A., ControlPULP: A RISC-V Power Controller for HPC Processors with Parallel Control-Law Computation Acceleration, in: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), GEWERBESTRASSE 11, CHAM, CH-6330, SWITZERLAND, Springer Science and Business Media Deutschland GmbH, 2022, 13511, pp. 120 - 135 (atti di: 22nd International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2021, grc, 2022) [Contribution to conference proceedings]
Garofalo, Angelo; Tortorella, Yvan; Perotti, Matteo; Valente, Luca; Nadalini, Alessandro; Benini, Luca; Rossi, Davide; Conti, Francesco, Darkside: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training, «IEEE OPEN JOURNAL OF SOLID-STATE CIRCUITS», 2022, 1, pp. 1 - 1 [Scientific article]Open Access
Angelo Garofalo; Matteo Perotti; Luca Valente; Yvan Tortorella; Alessandro Nadalini; Luca Benini; Davide Rossi; Francesco Conti, Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training, in: ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC), 2022, pp. 273 - 276 (atti di: ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC), Milano, Italy, 19/09/2022-22/09/2022) [Contribution to conference proceedings]
Abadal S.; Guirado R.; Taghvaee H.; Jain A.; Santana E.P.D.; Bolivar P.H.; Saeed M.; Negra R.; Wang Z.; Wang K.; Lemme M.C.; Klein J.; Zapater M.; Levisse A.; Atienza D.; Rossi D.; Conti F.; Dazzi M.; Karunaratne G.; Boybat I.; Sebastian A., Graphene-based Wireless Agile Interconnects for Massive Heterogeneous Multi-chip Processors, «IEEE WIRELESS COMMUNICATIONS», 2022, Early Access, pp. 1 - 8 [Scientific article]Open Access
Di Mauro A.; Scherer M.; Rossi D.; Benini L., Kraken: A Direct Event/Frame-Based Multi-sensor Fusion SoC for Ultra-Efficient Visual Processing in Nano-UAVs, in: 2022 IEEE Hot Chips 34 Symposium (HCS), 2022, pp. 1 - 19 (atti di: 2022 IEEE Hot Chips 34 Symposium (HCS), Cupertino, CA, USA, 21-23 August 2022) [Contribution to conference proceedings]
Tortorella, Yvan; Bertaccini, Luca; Rossi, Davide; Benini, Luca; Conti, Francesco, RedMulE: A Compact FP16 Matrix-Multiplication Accelerator for Adaptive Deep Learning on RISC-V-Based Ultra-Low-Power SoCs, in: DATE '22: Proceedings of the 2022 Conference & Exhibition on Design, Automation & Test in Europe, 2022, pp. 1099 - 1102 (atti di: 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), Antwerp, Belgium, 14-23 March 2022) [Contribution to conference proceedings]
Bruschi N.; Tagliavini G.; Conti F.; Abadal S.; Cabellos-Aparicio A.; Alarcon E.; Karunaratne G.; Boybat I.; Benini L.; Rossi D., Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference, in: 2022 IEEE 4th International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2022, pp. 170 - 173 (atti di: Artificial Intelligence Circuits and Systems (AICAS), Incheon, Korea, Republic of Korea, 13-15 June 2022) [Contribution to conference proceedings]Open Access
Rossi D.; Conti F.; Eggiman M.; Mauro A.D.; Tagliavini G.; Mach S.; Guermandi M.; Pullini A.; Loi I.; Chen J.; Flamand E.; Benini L., Vega: A Ten-Core SoC for IoT Endnodes with DNN Acceleration and Cognitive Wake-Up from MRAM-Based State-Retentive Sleep Mode, «IEEE JOURNAL OF SOLID-STATE CIRCUITS», 2022, 57, pp. 127 - 139 [Scientific article]Open Access
