Foto del docente

Luca Benini

Full Professor

Department of Electrical, Electronic, and Information Engineering "Guglielmo Marconi"

Academic discipline: ING-INF/01 Electronic Engineering

Publications

Valente L.; Rossi D.; Benini L., Hardware-In-The Loop Emulation for Agile Co-Design of Parallel Ultra-Low Power IoT Processors, in: IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC, IEEE Computer Society, 2021, 2021-, pp. 1 - 6 (atti di: 29th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2021, sgp, 2021) [Contribution to conference proceedings]

Forsberg B.; Benini L.; Marongiu A., HePREM: A Predictable Execution Model for GPU-based Heterogeneous SoCs, «IEEE TRANSACTIONS ON COMPUTERS», 2021, 70, Article number: 9035630 , pp. 17 - 29 [Scientific article]

Conficoni, Christian; Bartolini, Andrea; Tilli, Andrea; Cavazzoni, Carlo; Benini, Luca, HPC Cooling: A Flexible Modeling Tool for Effective Design and Management, «IEEE TRANSACTIONS ON SUSTAINABLE COMPUTING», 2021, 6, pp. 441 - 455 [Scientific article]Open Access

Polonelli T.; Schulthess L.; Mayer P.; Magno M.; Benini L., H-Watch: An open, connected platform for AI-enhanced CoViD19 infection symptoms monitoring and contact tracing, in: Proceedings - IEEE International Symposium on Circuits and Systems, 345 E 47TH ST, NEW YORK, NY 10017 USA, Institute of Electrical and Electronics Engineers Inc., 2021, 2021-, pp. 1 - 5 (atti di: 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021, CONFlux and Hotel Inter-Burgo Daegu, kor, 2021) [Contribution to conference proceedings]

Niculescu V.; Lamberti L.; Conti F.; Benini L.; Palossi D., Improving Autonomous Nano-Drones Performance via Automated End-to-End Optimization and Deployment of DNNs, «IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS», 2021, 11, pp. 548 - 562 [Scientific article]Open Access

Scheffler P.; Zaruba F.; Schuiki F.; Hoefler T.; Benini L., Indirection Stream Semantic Register Architecture for Efficient Sparse-Dense Linear Algebra, in: Proceedings -Design, Automation and Test in Europe, DATE, Institute of Electrical and Electronics Engineers Inc., 2021, 2021-, pp. 1787 - 1792 (atti di: 2021 Design, Automation and Test in Europe Conference and Exhibition, DATE 2021, Grenoble, France, 2021) [Contribution to conference proceedings]

Ozsoy C.; Cossettini A.; Ozbek A.; Vostrikov S.; Hager P.; Dean-Ben X.L.; Benini L.; Razansky D., LightSpeed: A Compact, High-Speed Optical-Link-Based 3D Optoacoustic Imager, «IEEE TRANSACTIONS ON MEDICAL IMAGING», 2021, 40, Article number: 9393879 , pp. 2023 - 2029 [Scientific article]

Zanghieri M.; Burrello A.; Benatti S.; Schindler K.; Benini L., Low-latency detection of epileptic seizures from IEEG with temporal convolutional networks on a low-power parallel MCU, in: 2021 IEEE Sensors Applications Symposium, SAS 2021 - Proceedings, Institute of Electrical and Electronics Engineers Inc., 2021, pp. 1 - 6 (atti di: 2021 IEEE Sensors Applications Symposium, SAS 2021, swe, 2021) [Contribution to conference proceedings]

Lamberti, Lorenzo; Rusci, Manuele; Fariselli, Marco; Paci, Francesco; Benini, Luca, Low-Power License Plate Detection and Recognition on a RISC-V Multi-Core MCU-Based Vision System, in: Proceedings - IEEE International Symposium on Circuits and Systems, 345 E 47TH ST, NEW YORK, NY 10017 USA, IEEE, «IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS PROCEEDINGS», 2021, pp. 1 - 5 (atti di: IEEE International Symposium on Circuits and Systems, ISCAS 2021, Daegu, Korea, 22-28 May 2021) [Contribution to conference proceedings]

Zaruba F.; Schuiki F.; Benini L., Manticore: A 4096-Core RISC-V Chiplet Architecture for Ultraefficient Floating-Point Computing, «IEEE MICRO», 2021, 41, Article number: 9296802 , pp. 36 - 42 [Scientific article]

Cavalcante M.; Riedel S.; Pullini A.; Benini L., MemPool: A Shared-L1 Memory Many-Core Cluster with a Low-Latency Interconnect, in: Proceedings -Design, Automation and Test in Europe, DATE, Institute of Electrical and Electronics Engineers Inc., 2021, 2021-, pp. 701 - 706 (atti di: 2021 Design, Automation and Test in Europe Conference and Exhibition, DATE 2021, Grenoble, France, 2021) [Contribution to conference proceedings]

Wistoff N.; Schneider M.; Gurkaynak F.K.; Benini L.; Heiser G., Microarchitectural Timing Channels and their Prevention on an Open-Source 64-bit RISC-V Core, in: Proceedings -Design, Automation and Test in Europe, DATE, Institute of Electrical and Electronics Engineers Inc., 2021, 2021-, pp. 627 - 632 (atti di: 2021 Design, Automation and Test in Europe Conference and Exhibition, DATE 2021, Grenoble, France, 2021) [Contribution to conference proceedings]

Wang X.; Schneider T.; Hersche M.; Cavigelli L.; Benini L., Mixed-precision quantization and parallel implementation of multispectral Riemannian classification for brain-machine interfaces, in: Proceedings - IEEE International Symposium on Circuits and Systems, 345 E 47TH ST, NEW YORK, NY 10017 USA, Institute of Electrical and Electronics Engineers Inc., 2021, 2021-, pp. 1 - 5 (atti di: 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021, CONFlux and Hotel Inter-Burgo Daegu, kor, 2021) [Contribution to conference proceedings]

Moallemi A.; Burrello A.; Brunelli D.; Benini L., Model-based vs. Data-driven Approaches for Anomaly Detection in Structural Health Monitoring: A Case Study, in: Conference Record - IEEE Instrumentation and Measurement Technology Conference, Institute of Electrical and Electronics Engineers Inc., 2021, 2021-, pp. 1 - 6 (atti di: 2021 IEEE International Instrumentation and Measurement Technology Conference, I2MTC 2021, Technology and Innovation Centre (TIC), gbr, 2021) [Contribution to conference proceedings]

Burrello A.; Pagliari D.J.; Bartolini A.; Benini L.; Macii E.; Poncino M., Predicting Hard Disk Failures in Data Centers Using Temporal Convolutional Neural Networks, in: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Springer Science and Business Media Deutschland GmbH, 2021, 12480, pp. 277 - 289 (atti di: Workshops held at the 26th International Conference on Parallel and Distributed Computing, Euro-Par 2020, Warsaw, Poland, 2020) [Contribution to conference proceedings]

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