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Luca Benini

Professore ordinario

Dipartimento di Ingegneria dell'Energia Elettrica e dell'Informazione "Guglielmo Marconi"

Settore scientifico disciplinare: ING-INF/01 ELETTRONICA

Pubblicazioni

M. Loghi;M. Poncino;L. Benini, Empirical Macromodeling of Operating System Communication Primitives, Probabilistic Analysis Techniques for Real Time and Embedded Systems, in: Proceedings of the 1st International Workshop on PROBABILISTIC ANALYSIS TECHNIQUES FOR REAL TIME AND EMBEDDED SYSTEMS (PARTES2004), s.l, s.n, 2004(atti di: 1st International Workshop on PROBABILISTIC ANALYSIS TECHNIQUES FOR REAL TIME AND EMBEDDED SYSTEMS (PARTES2004), Pisa, Italy, 26th September 2004) [Contributo in Atti di convegno]

L. Benini;D. Bertozzi;G. De Micheli, Energy-Efficient Network on Chip Dedign, in: E. MACII, Ultra Low Power Electronics and Design, LONDON, Kluwer, 2004, pp. 214 - 232 [capitolo di libro]

D. Bertozzi;L. Benini;G. De Micheli, Energy-efficient Network-on-chip design - Low power NoC design techniques, in: E. MACII, Ultra Low Power Electronics and Design, LONDON, Kluwer Academic Publishers, 2004, pp. 14 - 42 [capitolo di libro]

D. Bertozzi; L. Benini; G. De Micheli, Energy-Reliability trade-Off for NoCs, in: Networks on Chip, S.L., Springer, 2004, pp. 107 - 129 (Computer Science) [capitolo di libro]

S. Yoon;C. Nardini;L. Benini;G. De Micheli, Enhanced pClustering and its applications to gene expression data, in: Proceedings of IEEE Symposium on BIBE (Bioinformatics and Bioengineering), s.l, s.n, 2004, pp. 275 - 282 (atti di: IEEE Symposium on BIBE (Bioinformatics and Bioengineering), Taichung, Taiwan, May 19-21, 2004) [Contributo in Atti di convegno]

M. J. Absar;F. Poletti;P. Marchal;F. Catthoor;L. Benini, Fast and Power-Efficient Dynamic Data-Layout with DMA-Capable Memories, in: Proceedings of the First Int'l WORKSHOP ON POWER-AWARE REAL-TIME COMPUTING, s.l, s.n, 2004, pp. 1 - 4 (atti di: First Int'l WORKSHOP ON POWER-AWARE REAL-TIME COMPUTING, Pisa, Italy, September 26, 2004) [Contributo in Atti di convegno]

L. Benini, First Int'l WORKSHOP ON POWER-AWARE REAL-TIME COMPUTING (PARC 2004) September 26, 2004 Pisa, Italy, 2004. [mostra o esposizione]

C. Stagni;C. Guiducci;L. Benini;B. Ricco';G. Zuccheri;B. Samori;U.Mastromatteo, Fully electronic DNA detection technique, in: Proceedings of the 9th Italian Conference SENSORS AND MICROSYSTEMS, s.l, s.n, 2004, pp. 67 - 71 (atti di: AISEM 2004, Ferrara, Italy, 8–11 February 2004) [Contributo in Atti di convegno]

C. Nardini;M. Diehn;B. K. Chan;L. Benini;G. De Micheli;M. D. Kuo, Imaging Correlation with Alterations in Global Gene Expression for Functional Radiogenomic Analysis, in: Radiological Society of Nord America, Book of Abstracts, s.l, s.n, 2004, pp. 403 - 403 (atti di: Radiological Society of Nord America, Chicago, Usa, Nov 28 - Dec 3, 2004) [atti di convegno-abstract]

E. Lattanzi;A. Gayasen;M. Kandemir;N. Vijaykrishnan;L. Benini;A. Bogliolo, Improving Java performance using dynamic method migration on FPGAs, in: Proceedings of the IEEE Parallel and Distributed Processing Symposium, s.l, s.n, 2004, pp. 134b - 134b (atti di: 18th International Parallel and Distributed Processing Symposium (IPDPS'04), Santa Fe, New Mexico, April 26 – 30, 2004) [Contributo in Atti di convegno]

MARCHAL P.; GOMEZ J.; BRUNI D.; BENINI L.; PINUEL L.; CATTHOOR F., Integrated task-scheduling and data-assignment to enable SDRAM power/performance trade-offs in dynamic applications, «IEEE DESIGN & TEST OF COMPUTERS», 2004, 21, pp. 378 - 387 [articolo]

BISDOUNIS L.; DRE C.; BLIONAS S.; METAFAS D.; TATSAKI A.; IEROMNIMON F.; MACII E.; ROUZET P.; ZAFALON R.; BENINI L., Low-Power System-on-Chip Architecture for Wireless LANs, «IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES», 2004, 151, pp. 2 - 15 [articolo]

BENINI L.; BRUNI D.; MACII A.; MACII E., Memory Energy Minimization by Data Compression: Algorithms, Architectures and Implementation, «IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS», 2004, 12, pp. 255 - 268 [articolo]

D. Bertozzi;L. Benini;G. De Micheli, Network-on-Chip Design for Gigascale Systems-on-Chip, in: RICHARD ZURAWSKI, Industrial Information Technology Handbook, LONDON, CRC Press, 2004, pp. 95.1 - 95.18 [capitolo di libro]

L. Benini;G. De Micheli, Networks on chip: A new paradigm for component-based MPSoC design, in: A. JERRAYA. W. WOLF, Multiprocessor Systems-on-Chip, SAN FRANCISCO, Morgan Kaufman, 2004, pp. 49 - 80 [capitolo di libro]

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