1) Architectures and analog circuit blocks for PCM-based in-memory computingSince a large part of the total power consumption is due to wireless transmission, accomplishing some computational tasks directly onboard of IoT nodes to shorten the streams of data to be transmitted – so-called edge computing – is extremely attractive. Goal of the proposed research activity is to explore Analog-in-Memory Computing (AIMC) technique for edge computing purposes. To this end, the potential of the Phase Change Memory (PCM) will be exploited because it has emerged as a valuable option in the field of resistive non-volatile memories for AIMC. The memory elements that can be programmed to arbitrary resistance/conductance states will be arranged in a crossbar architecture. By means of Ohm’s law and Kirchhoff’s current rules, vector-matrix multiplications can be thus performed in the analog domain efficiently. The focus of the research, carried out in the framework of the joint STMicroelelctronics-ARCES lab, is the design of an architecture for AIMC and of the analog blocks necessary for the non-conventional operation of the array.
2) Autonomous sensing and actuating IoT nodes.
The IoT paradigm is based on networks of nodes capable of sensing and actuating on the environment. Each node is battery powered so it has strict energy constraints in order to extend battery life. Different strategies and technologies are studied to reduce the nodes power consumption and to optimize the communication performance. As the radio consumption is the largest contributor to node power budget, radio Wake-Up technology is currently being studied to turn off the main transceiver while the communication is not needed. The activity is carried out in the framework of the joint STMicroelelctronics-ARCES lab.
