Foto del docente

Angelo Garofalo

Ricercatore a tempo determinato tipo a) (junior)

Dipartimento di Ingegneria dell'Energia Elettrica e dell'Informazione "Guglielmo Marconi"

Settore scientifico disciplinare: ING-INF/01 ELETTRONICA

Pubblicazioni

Nadalini, A; Rutishauser, G; Burrello, A; Bruschi, N; Garofalo, A; Benini, L; Conti, F; Rossi, D, A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks, in: 2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 345 E 47TH ST, NEW YORK, NY 10017 USA, IEEE, «PROCEEDINGS IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI», 2023, pp. 145 - 150 (atti di: 2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Foz do Iguacu, Brazil, 2023) [Contributo in Atti di convegno]Open Access

Le Gallo, Manuel; Khaddam-Aljameh, Riduan; Stanisavljevic, Milos; Vasilopoulos, Athanasios; Kersting, Benedikt; Dazzi, Martino; Karunaratne, Geethan; Brändli, Matthias; Singh, Abhairaj; Müller, Silvia M.; Büchel, Julian; Timoneda, Xavier; Joshi, Vinay; Rasch, Malte J.; Egger, Urs; Garofalo, Angelo; Petropoulos, Anastasios; Antonakopoulos, Theodore; Brew, Kevin; Choi, Samuel; Ok, Injo; Philip, Timothy; Chan, Victor; Silvestre, Claire; Ahsan, Ishtiaq; Saulnier, Nicole; Narayanan, Vijay; Francese, Pier Andrea; Eleftheriou, Evangelos; Sebastian, Abu, A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference, «NATURE ELECTRONICS», 2023, 6, pp. 680 - 693 [articolo]

Maicol Ciani; Stefano Bonato; Rafail Psiakis; Angelo Garofalo; Luca Valente; Suresh Sugumar; Alessandro Giusti; Davide Rossi; Daniele Palossi, Cyber Security aboard Micro Aerial Vehicles: An OpenTitan-based Visual Communication Use Case, in: Proceedings of 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 345 E 47TH ST, NEW YORK, NY 10017 USA, IEEE, 2023, pp. 1 - 5 (atti di: 2023 IEEE International Symposium on Circuits and Systems (ISCAS), Monterey, California, USA, 2023) [Contributo in Atti di convegno]Open Access

Gianmarco Ottavi; Angelo Garofalo; Giuseppe Tagliavini; Francesco Conti; Alfio Di Mauro; Luca Benini; Davide Rossi, Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode, «IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS», 2023, 70, pp. 2450 - 2463 [articolo]Open Access

Mattia Sinigaglia; Luca Bertaccini; Luca Valente; Angelo Garofalo; Simone Benatti; Luca Benini; Francesco Conti; Davide Rossi, ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays, in: Proceedings of 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 345 E 47TH ST, NEW YORK, NY 10017 USA, IEEE, 2023, pp. 1 - 5 (atti di: 2023 IEEE International Symposium on Circuits and Systems (ISCAS), Monterey, California, USA., 2023) [Contributo in Atti di convegno]

Bruschi, Nazareno; Tagliavini, Giuseppe; Garofalo, Angelo; Conti, Francesco; Boybat, Irem; Benini, Luca; Rossi, Davide, End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture, in: 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), New York, IEEE, 2023, pp. 1 - 6 (atti di: Design, Automation & Test in Europe Conference & Exhibition (DATE), Antwerp, Belgium, 17-19 April 2023) [Contributo in Atti di convegno]Open Access

Islamoglu, Gamze; Scherer, Moritz; Paulin, Gianna; Fischer, Tim; Jung, Victor J.B.; Garofalo, Angelo; Benini, Luca, ITA: An Energy-Efficient Attention and Softmax Accelerator for Quantized Transformers, in: 2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), 345 E 47TH ST, NEW YORK, NY 10017 USA, IEEE, 2023, pp. . - . (atti di: 2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), Vienna, Austria, 07-08 August 2023) [Contributo in Atti di convegno]

Francesco Conti; Gianna Paulin; Angelo Garofalo; Davide Rossi; Alfio Di Mauro; Georg Rutishauser; Gianmarco Ottavi; Manuel Eggimann; Hayate Okuhara; Luca Benini, Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2???8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing, «IEEE JOURNAL OF SOLID-STATE CIRCUITS», 2023, 59, Article number: 10269153, pp. 128 - 142 [articolo]Open Access

Valente, L.; Veeran, A.; Sinigaglia, M.; Tortorella, Y.; Nadalini, A.; Wistoff, N.; Sá, B.; Garofalo, A.; Psiakis, R.; Tolba, M.; Kulmala, A.; Limaye, N.; Sinanoglu, O.; Pinto, S.; Palossi, D.; Benini, L.; Mohammad, B.; Rossi, D., Shaheen: An Open, Secure, and Scalable RV64 SoC for Autonomous Nano-UAVs, in: Proceedings of the 2023 IEEE Hot Chips 35 Symposium (HCS), 2023(atti di: Hot Chips 35 Symposium, Stanford, 27/08/2023) [atti di convegno-poster]

Conti, Francesco; Rossi, Davide; Paulin, Gianna; Garofalo, Angelo; Di Mauro, Alfio; Rutishauer, Georg; Ottavi, Gian marco; Eggimann, Manuel; Okuhara, Hayate; Huard, Vincent; Montfort, Olivier; Jure, Lionel; Exibard, Nils; Gouedo, Pascal; Louvat, Mathieu; Botte, Emmanuel; Benini, Luca, 22.1 A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing, in: 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, pp. 21 - 23 (atti di: 2023 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, 2023) [Contributo in Atti di convegno]

Garofalo, A; Ottavi, G; Conti, F; Karunaratne, G; Boybat, I; Benini, L; Rossi, D, A Heterogeneous In-Memory Computing Cluster for Flexible End-to-End Inference of Real-World Deep Neural Networks, «IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS», 2022, 12, pp. 422 - 435 [articolo]Open Access

Montagna F.; Mach S.; Benatti S.; Garofalo A.; Ottavi G.; Benini L.; Rossi D.; Tagliavini G., A Low-Power Transprecision Floating-Point Cluster for Efficient Near-Sensor Data Analytics, «IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS», 2022, 33, pp. 1038 - 1053 [articolo]Open Access

Garofalo, Angelo; Tortorella, Yvan; Perotti, Matteo; Valente, Luca; Nadalini, Alessandro; Benini, Luca; Rossi, Davide; Conti, Francesco, Darkside: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training, «IEEE OPEN JOURNAL OF SOLID-STATE CIRCUITS», 2022, 1, pp. 1 - 1 [articolo]Open Access

Angelo Garofalo; Matteo Perotti; Luca Valente; Yvan Tortorella; Alessandro Nadalini; Luca Benini; Davide Rossi; Francesco Conti, Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training, in: ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC), 2022, pp. 273 - 276 (atti di: ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC), Milano, Italy, 19/09/2022-22/09/2022) [Contributo in Atti di convegno]

Garofalo A.; Ottavi G.; Di Mauro A.; Conti F.; Tagliavini G.; Benini L.; Rossi D., A 1.15 TOPS/W, 16-Cores Parallel Ultra-Low Power Cluster with 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode, in: ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference, Proceedings, New York, Institute of Electrical and Electronics Engineers Inc., 2021, pp. 267 - 270 (atti di: 47th IEEE European Solid State Circuits Conference, ESSCIRC 2021, Grenoble/ France, 6 September - 9 September 2021) [Contributo in Atti di convegno]Open Access

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