Wang, Run; Islamoglu, Gamze; Belano, Andrea; Potocnik, Viviane; Conti, Francesco; Garofalo, Angelo; Benini, Luca, VEXP: A Low-Cost RISC-V ISA Extension for Accelerated Softmax Computation in Transformers, in: Proceedings - Symposium on Computer Arithmetic, 10662 LOS VAQUEROS CIRCLE, PO BOX 3014, LOS ALAMITOS, CA 90720-1264 USA, Institute of Electrical and Electronics Engineers Inc., 2025, pp. 37 - 44 (atti di: 32nd IEEE Symposium on Computer Arithmetic, ARITH 2025, University of Texas, usa el paso, 04-07 May 2025) [Contributo in Atti di convegno]
Boybat, I.; Boesch, T.; Allegra, M.; Baldo, M.; Bertolini-Agnoletto, J. J.; Burr, G. W.; Buschini, A.; Cabrini, A.; Calvetti, E.; Cappetta, C.; Conti, F.; Ferro, E.; Franchi Scarselli, E.; Garofalo, A.; Girardi, F.; Islamoglu, G.; Jonnalagadda, V. P.; Karunaratne, G.; Lammie, C.; Le Gallo, M.; Li, C.; Massa, R.; Ornstein, A. C.; Pang, H.; Pasotti, M.; Rajendran, B.; Redaelli, A.; Sanli, I.; Simon, W. A.; Singh, A.; Singh, S. -P.; Urlini, G.; Vasilopoulos, A.; Zurla, R.; Desoli, G.; Sebastian, A., Heterogeneous Embedded Neural Processing Units Utilizing PCM-Based Analog In-Memory Computing, in: Proceedings 2024 IEEE Electron Devices Meeting (IEDM), IEEE, 2024, pp. 1 - 4 (atti di: IEEE International Electron Devices Meeting (IEDM 2024), San Francisco CA USA, 07-11 December 2024) [Contributo in Atti di convegno]
Conti, Francesco; Paulin, Gianna; Garofalo, Angelo; Rossi, Davide; Di Mauro, Alfio; Rutishauser, Georg; Ottavi, Gianmarco; Eggimann, Manuel; Okuhara, Hayate; Benini, Luca, Marsellus: A Heterogeneous RISC-V AI-IoT End-Node SoC With 2???8 b DNN Acceleration and 30%-Boost Adaptive Body Biasing, «IEEE JOURNAL OF SOLID-STATE CIRCUITS», 2024, 59, Article number: 10269153, pp. 128 - 142 [articolo]Open Access
Ciani, Maicol; Parisi, Emanuele; Musa, Alberto; Barchi, Francesco; Bartolini, Andrea; Kulmala, Ari; Psiakis, Rafail; Garofalo, Angelo; Acquaviva, Andrea; Rossi, Davide, Unleashing OpenTitan’s Potential: a Silicon-Ready Embedded Secure Element for Root of Trust and Cryptographic Offloading, «ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS», 2024, 24, Article number: 67, pp. 1 - 29 [articolo]
Zelioli, Enrico; Ottaviano, Alessandro; Balas, Robert; Wistoff, Nils; Garofalo, Angelo; Benini, Luca, vCLIC: Towards Fast Interrupt Handling in Virtualized RISC-V Mixed-Criticality Systems, in: Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors, Institute of Electrical and Electronics Engineers Inc., 2024, pp. 288 - 291 (atti di: 42nd IEEE International Conference on Computer Design, ICCD 2024, Milan, Italy, 18-20 November 2024) [Contributo in Atti di convegno]
Nadalini, A; Rutishauser, G; Burrello, A; Bruschi, N; Garofalo, A; Benini, L; Conti, F; Rossi, D, A 3 TOPS/W RISC-V Parallel Cluster for Inference of Fine-Grain Mixed-Precision Quantized Neural Networks, in: 2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 345 E 47TH ST, NEW YORK, NY 10017 USA, IEEE, «PROCEEDINGS IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI», 2023, pp. 145 - 150 (atti di: 2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Foz do Iguacu, Brazil, 2023) [Contributo in Atti di convegno]Open Access
Le Gallo, Manuel; Khaddam-Aljameh, Riduan; Stanisavljevic, Milos; Vasilopoulos, Athanasios; Kersting, Benedikt; Dazzi, Martino; Karunaratne, Geethan; Brändli, Matthias; Singh, Abhairaj; Müller, Silvia M.; Büchel, Julian; Timoneda, Xavier; Joshi, Vinay; Rasch, Malte J.; Egger, Urs; Garofalo, Angelo; Petropoulos, Anastasios; Antonakopoulos, Theodore; Brew, Kevin; Choi, Samuel; Ok, Injo; Philip, Timothy; Chan, Victor; Silvestre, Claire; Ahsan, Ishtiaq; Saulnier, Nicole; Narayanan, Vijay; Francese, Pier Andrea; Eleftheriou, Evangelos; Sebastian, Abu, A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference, «NATURE ELECTRONICS», 2023, 6, pp. 680 - 693 [articolo]Open Access
Maicol Ciani; Stefano Bonato; Rafail Psiakis; Angelo Garofalo; Luca Valente; Suresh Sugumar; Alessandro Giusti; Davide Rossi; Daniele Palossi, Cyber Security aboard Micro Aerial Vehicles: An OpenTitan-based Visual Communication Use Case, in: Proceedings of 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 345 E 47TH ST, NEW YORK, NY 10017 USA, IEEE, 2023, pp. 1 - 5 (atti di: 2023 IEEE International Symposium on Circuits and Systems (ISCAS), Monterey, California, USA, 2023) [Contributo in Atti di convegno]Open Access
Gianmarco Ottavi; Angelo Garofalo; Giuseppe Tagliavini; Francesco Conti; Alfio Di Mauro; Luca Benini; Davide Rossi, Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode, «IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS», 2023, 70, pp. 2450 - 2463 [articolo]Open Access
Mattia Sinigaglia; Luca Bertaccini; Luca Valente; Angelo Garofalo; Simone Benatti; Luca Benini; Francesco Conti; Davide Rossi, ECHOES: a 200 GOPS/W Frequency Domain SoC with FFT Processor and I2S DSP for Flexible Data Acquisition from Microphone Arrays, in: Proceedings of 2023 IEEE International Symposium on Circuits and Systems (ISCAS), 345 E 47TH ST, NEW YORK, NY 10017 USA, IEEE, 2023, pp. 1 - 5 (atti di: 2023 IEEE International Symposium on Circuits and Systems (ISCAS), Monterey, California, USA., 2023) [Contributo in Atti di convegno]
Bruschi, Nazareno; Tagliavini, Giuseppe; Garofalo, Angelo; Conti, Francesco; Boybat, Irem; Benini, Luca; Rossi, Davide, End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture, in: 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), New York, IEEE, «PROCEEDINGS - DESIGN, AUTOMATION, AND TEST IN EUROPE CONFERENCE AND EXHIBITION», 2023, pp. 1 - 6 (atti di: Design, Automation & Test in Europe Conference & Exhibition (DATE), Antwerp, Belgium, 17-19 April 2023) [Contributo in Atti di convegno]Open Access
Islamoglu, Gamze; Scherer, Moritz; Paulin, Gianna; Fischer, Tim; Jung, Victor J. B.; Garofalo, Angelo; Benini, Luca, ITA: An Energy-Efficient Attention and Softmax Accelerator for Quantized Transformers, in: 2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), 345 E 47TH ST, NEW YORK, NY 10017 USA, IEEE, 2023, pp. 1 - 6 (atti di: 2023 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), Vienna, Austria, 07-08 August 2023) [Contributo in Atti di convegno]
Valente, L.; Veeran, A.; Sinigaglia, M.; Tortorella, Y.; Nadalini, A.; Wistoff, N.; Sá, B.; Garofalo, A.; Psiakis, R.; Tolba, M.; Kulmala, A.; Limaye, N.; Sinanoglu, O.; Pinto, S.; Palossi, D.; Benini, L.; Mohammad, B.; Rossi, D., Shaheen: An Open, Secure, and Scalable RV64 SoC for Autonomous Nano-UAVs, in: Proceedings of the 2023 IEEE Hot Chips 35 Symposium (HCS), 2023(atti di: Hot Chips 35 Symposium, Stanford, 27/08/2023) [atti di convegno-poster]
Conti, Francesco; Rossi, Davide; Paulin, Gianna; Garofalo, Angelo; Di Mauro, Alfio; Rutishauer, Georg; Ottavi, Gian marco; Eggimann, Manuel; Okuhara, Hayate; Huard, Vincent; Montfort, Olivier; Jure, Lionel; Exibard, Nils; Gouedo, Pascal; Louvat, Mathieu; Botte, Emmanuel; Benini, Luca, 22.1 A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing, in: 2023 IEEE International Solid-State Circuits Conference (ISSCC), 2023, pp. 21 - 23 (atti di: 2023 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, USA, 2023) [Contributo in Atti di convegno]
Garofalo, A; Ottavi, G; Conti, F; Karunaratne, G; Boybat, I; Benini, L; Rossi, D, A Heterogeneous In-Memory Computing Cluster for Flexible End-to-End Inference of Real-World Deep Neural Networks, «IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS», 2022, 12, pp. 422 - 435 [articolo]Open Access
