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Angelo Garofalo

Ricercatore a tempo determinato tipo a) (junior)

Dipartimento di Ingegneria dell'Energia Elettrica e dell'Informazione "Guglielmo Marconi"

Settore scientifico disciplinare: ING-INF/01 ELETTRONICA

Pubblicazioni

Burrello, Alessio; Garofalo, Angelo; Bruschi, Nazareno; Tagliavini, Giuseppe; Rossi, Davide; Conti, Francesco, DORY: Automatic End-to-End Deployment of Real-World DNNs on Low-Cost IoT MCUs, «IEEE TRANSACTIONS ON COMPUTERS», 2021, 70, pp. 1253 - 1268 [articolo]Open Access

Montagna, Fabio; Tagliavini, Giuseppe; Rossi, Davide; Garofalo, Angelo; Benini, Luca, Streamlining the OpenMP Programming Model on Ultra-Low-Power Multi-core MCUs, in: Architecture of Computing Systems, Cham, Springer, «LECTURE NOTES IN COMPUTER SCIENCE», 2021, 12800, pp. 167 - 182 (atti di: 34th International Conference on Architecture of Computing Systems, Online, 7-8 Giugno 2021) [Contributo in Atti di convegno]Open Access

Garofalo A.; Tagliavini G.; Conti F.; Benini L.; Rossi D., XpulpNN: Enabling Energy Efficient and Flexible Inference of Quantized Neural Networks on RISC-V Based IoT End Nodes, «IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING», 2021, 9, pp. 1489 - 1505 [articolo]Open Access

Ottavi G.; Garofalo A.; Tagliavini G.; Conti F.; Benini L.; Rossi D., A mixed-precision RISC-V processor for extreme-edge DNN inference, in: Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, IEEE Computer Society, «PROCEEDINGS IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI», 2020, 2020-, pp. 512 - 517 (atti di: 19th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2020, Cyprus, 2020) [Contributo in Atti di convegno]Open Access

Nazareno Bruschi, Angelo Garofalo, Francesco Conti, Giuseppe Tagliavini, Davide Rossi, Enabling mixed-precision quantized neural networks in extreme-edge devices, in: 17th ACM International Conference on Computing Frontiers 2020, CF 2020 - Proceedings, New York, Association for Computing Machinery, Inc, 2020, pp. 217 - 220 (atti di: 17th ACM International Conference on Computing Frontiers, CF 2020, Catania (Italy), 11 Maggio 2020 - 13 Maggio 2020) [Contributo in Atti di convegno]Open Access

Garofalo A.; Rusci M.; Conti F.; Rossi D.; Benini L., PULP-NN: Accelerating Quantized Neural Networks on Parallel Ultra-Low-Power RISC-V Processors, «PHILOSOPHICAL TRANSACTIONS OF THE ROYAL SOCIETY OF LONDON SERIES A: MATHEMATICAL PHYSICAL AND ENGINEERING SCIENCES», 2020, 378, Article number: 20190155, pp. 1 - 22 [articolo]Open Access

Garofalo, Angelo; Tagliavini, Giuseppe; Conti, Francesco; Rossi, Davide; Benini, Luca, XpulpNN: Accelerating Quantized Neural Networks on RISC-V Processors Through ISA Extensions, in: 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), Institute of Electrical and Electronics Engineers Inc. (IEEE), 2020, pp. 186 - 191 (atti di: Design, Automation and Test in Europe Conference and Exhibition, DATE 2020, Grenoble, France, 9-13 March 2020) [Contributo in Atti di convegno]Open Access

Ruospo A.; Cantoro R.; Sanchez E.; Schiavone P.D.; Garofalo A.; Benini L., On-line testing for autonomous systems driven by RISC-V processor design verification, in: 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Institute of Electrical and Electronics Engineers Inc., 2019, pp. 1 - 6 (atti di: 32nd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, nld, 2019) [Contributo in Atti di convegno]

Garofalo A.; Rusci M.; Conti F.; Rossi D.; Benini L., PULP-NN: A computing library for quantized neural network inference at the edge on RISC-V based parallel ultra low power clusters, in: 2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019, 345 E 47TH ST, NEW YORK, NY 10017 USA, Institute of Electrical and Electronics Engineers Inc., 2019, pp. 33 - 36 (atti di: 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019, ita, 2019) [Contributo in Atti di convegno]Open Access

Burrello A.; Conti F.; Garofalo A.; Rossi D.; Benini L., Work-in-progress: Dory: Lightweight memory hierarchy management for deep NN inference on iot endnodes, in: Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion, CODES/ISSS 2019, Association for Computing Machinery, Inc, 2019, pp. 1 - 2 (atti di: 2019 International Conference on Hardware/Software Codesign and System Synthesis, CODES/ISSS 2019, New York, October 2019) [Contributo in Atti di convegno]Open Access

Garofalo, Angelo; Testoni, Nicola; Marzani, Alessandro; De Marchi, Luca, Wavelet-based Lamb waves direction of arrival estimation in passive monitoring techniques, in: 2016 IEEE International Ultrasonics Symposium (IUS), 2016, pp. 1 - 4 (atti di: 2016 IEEE International Ultrasonics Symposium (IUS), Tours, France, 18-21 September 2016) [Contributo in Atti di convegno]

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