Angelo Garofalo

Ricercatore a tempo determinato tipo a) (junior)

Dipartimento di Ingegneria dell'Energia Elettrica e dell'Informazione "Guglielmo Marconi"

Settore scientifico disciplinare: IINF-01/A Elettronica

Didattica

Argomenti di tesi proposti dal docente.

Design of RISC-V Vector ISA extensions for Post-Quantum cryptography
Design of hardware accelerators for on-the-fly encryption/decryption and hashing
Implementation of Radar Signal Processing algorithms on a RISC-V automotive platform
Design of time-predictable solutions for AXI interconnect
Design of a vector processor tightly-coupled with AI in-memory computing accelerators
Design of a fault-tolerant SW AI compiler by exploiting hardware hybrid-modular-redundancy in safety-critical SoCs
Exploraion of Residual Number Systems and/or A-arithmetic to design fault-tolerant GEMM accelerators for AI
Design of a fault-tolerant GEMM accelerator based on ABFT mechanisms
Design of a Fault Management Unit for detection, classification and handling of hardware faults in safety-critical systems
Implementation of an observability methodology to classify Architectural/Program Vulnerability Factors (AVF/PVF) of a safety-critical SoC
Design of fault-injection mechanisms to assess reliability and fault-tolerance of compute systems in micro-architectural simulators
Study of the fault-tolerant data formats for resilient AI algorithms