M. Loghi;M. Letis;M. Poncino;L. Benini, Exploring the Energy Efficiency of Cache Coherence Protocols in Single-Chip Multi-Processors, in: Proceedings of ACM Great Lakes Symposium on VLSI (GLSVLSI), s.l, s.n, 2005(atti di: ACM Great Lakes Symposium on VLSI (GLSVLSI), Chicago, Usa, April 17-19, 2005) [Contributo in Atti di convegno]
A. Pullini;F. Angiolini;D. Bertozzi;L. Benini, Fault Tolerance Overhead in Network-on-Chip Flow Control Schemes, in: Proceedings of the SBCCI Conference 2005, s.l, s.n, 2005(atti di: 18th SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, Florianópolis - Brazil, September 4-7, 2005) [Contributo in Atti di convegno]
S. Yoon;L. Benini;G. De Micheli, Finding Co-Clusters of Genes and Clinical Parameters, in: Proceedings of the 27th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, SHANGHAI, s.n, 2005, pp. 906 - 921 (atti di: The 27th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, Shanghai china, 1-4 Sept. 2005) [Contributo in Atti di convegno]
C. Stagni;C. Guiducci;M. Lanzoni;L. Benini;B. Ricco', Hardware-Software Design of a Smart Sensor for Fully-Electronic DNA Hybridization Detection, in: Design, Automation and Test in Europe Conference and Exhibition 2005. Proceedings, LOS ALAMITOS, CA, IEEE Comput. Soc, 2005, 3, pp. 198 - 203 (atti di: 2005 Design, Automation and Test in Europe Conference and Exhibition, Munich, Germany, March 7-11, 2005) [Contributo in Atti di convegno]
E. Lattanzi; A. Gayasen; M. Kandemir; V. Narayanan; L. Benini; A. Bogliolo, Improving Java performance using dynamic method migration on FPGAs, «INTERNATIONAL JOURNAL OF EMBEDDED SYSTEMS», 2005, 1, n. 3/4, pp. 228 - 236 [articolo]
P. Babighian;L. Benini;A. Macii;E. Macii, Low-Overhead State-Retaining Elements for Low-Leakage MTCMOS Design, in: Proceedings of the 15th ACM Great Lakes symposium on VLSI, s.l, s.n, 2005, pp. 367 - 370 (atti di: The 15th ACM Great Lakes symposium on VLSI, Chicago, USA, April 17-19, 2005) [Contributo in Atti di convegno]
L. Benini;D. Bertozzi;A. Bogliolo;F. Menichelli;M. Olivieri, MPARM: Exploring the Multi-Processor SoC Design Space with SystemC, «JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY», 2005, 41, pp. 169 - 182 [articolo]
M. D. Kuo;C. Nardini;D. Wang;L. Benini;G. De Micheli;S. Cha;M. Diehn, MRI Guided Feature Evaluation of Characteristic Gene Expression Signatures in Glioblastoma Multiforme, in: European Congress of Radiology, Book of Abstracts, s.l, s.n, 2005, 15, pp. B-439 - B-439 (atti di: European Congress of Radiology, Vienna, Austria, Oct 2005) [atti di convegno-abstract]
S. Murali;L. Benini;G. De Micheli, Mapping and Physical Planning of Networks-on-Chip Architectures with Quality-of-Service Guarantees, in: Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, IEEE Press, 2005, 1, pp. 27 - 32 (atti di: 2005 Asia and South Pacific Design Automation Conference, ASP-DAC 2005, Shanghai; China, 18-21 Jan 2005) [Contributo in Atti di convegno]
L. Benini; D. Bertozzi; A. Guerri; M. Milano; F.Poletti, Measuring Efficiency and Executability of Allocation and Scheduling in Multi-Processor Systems-on-Chip, «INTELLIGENZA ARTIFICIALE», 2005, Anno 2, Vol. 3, pp. 13 - 21 [articolo]
Guiducci C.; Stagni C.; Benini L.; Zuccheri G.; Samorì B.; Caputo D.; Nascetti A.; De Cesare D.; Riccò B., Microfabricated sensors for label-free electronic DNA detection, in: MMD-meeting workbook: Topical Sessions, GENOVA, s.n, 2005, pp. 11 - 11 (atti di: Matter, Materials and Devices Meeting (MMD Meeting), Genova, 22-25 Giugno 2005) [atti di convegno-abstract]
D. Bertozzi;L. Benini;G. De Micheli, Network-on-Chip Design for Gigascale Systems-on-Chip, in: RICHARD ZURAWSKI, EMBEDDED SYSTEMS HANDBOOK, LONDON, CRC Press, 2005, pp. 15 - 43 [capitolo di libro]
L. Benini;D. Bertozzi, Network-on-chip architectures and design methods, in: BASHIR AL-HASHIMI, System-on-Chip: Next Generation Electronics, LONDON, IEE Books, 2005, pp. 16 - 49 [capitolo di libro]
L. Benini;D. Bertozzi, Network-on-chip architectures and design methods, «IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES», 2005, 152, pp. 261 - 272 [articolo]
D. Bertozzi;A. Jalabert;S. Murali;R. Tamhankar;S. Stergiou;L. Benini;G. De Micheli, NoC Synthesis Flow for Customized Domain Specific Mutliprocessor Systems-on-Chip, «IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS», 2005, 2, pp. 113 - 129 [articolo]
