Benocci M.; Farella E.; Benini L.; Vanzago L., Optimizing ZigBee for data streaming in body-area bio-feedback applications, in: Advances in sensors and Interfaces, 2009. IWASI 2009. 3rd International Workshop on, NEW YORK, IEEE Press, 2009, pp. 150 - 155 (atti di: Advances in sensors and Interfaces, 2009. IWASI 2009. 3rd International Workshop on, Trani (Bari), 25-26 June 2009) [Contributo in Atti di convegno]
L.Benini; R.Grottesi; S.Morigi; M.Ruggiero, Parallel rendering and editing of subdivision surfaces on the Cell BE processor, in: Proceedings ACM SIGGRAPH 2009- High Peformance Graphics, 2009(atti di: ACM SIGGRAPH 2009- High Peformance Graphics, New Orleans, USA, 1-3 agosto 2009) [atti di convegno-poster]
D. Brunelli; D. Dondi; A. Bertacchini; L. Larcherc; P. Pavan; L. Benini., Photovoltaic scavenging systems: Modeling and optimization, «MICROELECTRONICS JOURNAL», 2009, n.9 vol.40, pp. 1337 - 1344 [articolo]
A. Sathanur; A. Pullini; L. Benini; G. De Micheli; E. Macii, Physically clustered Forward Body Biasing for variability compensation in nano-meter CMOS design, in: Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09., s.l, IEEE Press, 2009, pp. 154 - 159 (atti di: Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09., Nice, France, 20-24 April 2009) [Contributo in Atti di convegno]
Benini L., Predictability vs. Efficiency in the Multicore Era: Fight of Titans or Happy Ever after?, in: Computer Aided Verification, BERLIN, HEIDELBERG, Springer-Verlag, 2009, pp. 50 - 50 (Lecture Notes In Computer Science) [capitolo di libro]
M. Ruggiero; D. Bertozzi; L. Benini; M. Milano; A. Andrei, Reducing the Abstraction and Optimality Gaps in the Allocation and Scheduling for Variable Voltage/Frequency MPSoC Platforms, «IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS», 2009, 3,28, pp. 378 - 391 [articolo]
M. Lombardi; M. Milano; L. Benini, Robust non-preemptive hard real-time scheduling for clustered multicore platforms, in: Design, Automation and Test in Europe, DATE 2009, s.l, IEEE Press, 2009, pp. 803 - 808 (atti di: Design, Automation and Test in Europe, DATE 2009, Nice, France, 2009 April 20-24) [Contributo in Atti di convegno]
C. Seiculescu; S. Murali; L. Benini; G. De Micheli, SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3D Systems on Chip, in: Design, Automation & Test in Europe Conference & Exhibition DATE 2009, s.l, IEEE Press, 2009, pp. 9 - 14 (atti di: Design, Automation & Test in Europe Conference & Exhibition DATE 2009, Nice, France, 20-24 April 2009) [Contributo in Atti di convegno]
S. Murali; C. Seiculescu; L. Benini; G. de Micheli, Syntesis of networks on chips for 3D systems on chips. ASP-DAC ’09, in: Proceedings of the 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009, s.l, IEEE Press, 2009, pp. 242 - 247 (atti di: 14th Asia South Pacific Design Automation Conference, ASP-DAC 2009, Yokohama, Japan, January 19-22, 2009) [Contributo in Atti di convegno]
Loi I.; Angiolini F.; Benini L., Synthesis of low-overhead configurable source routing tables for network interfaces, in: Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09, NEW YORK, IEEE Press, 2009, pp. 262 - 267 (atti di: Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09, Nice, France, 20-24 April 2009) [Contributo in Atti di convegno]
Facchini M.; Carlson T.; Vignon A.; Palkovic M.; Catthoor F.; Dehaene W.; Benini L.; Marchal P., System-level power/performance evaluation of 3D stacked DRAMs for mobile applications, in: Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09, NEW YORK, IEEE Press, 2009, pp. 923 - 928 (atti di: Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09, Nice, france, 20-24 April 2009) [Contributo in Atti di convegno]
Sathanur A.; Benini L.; Macii A.; Macii E.; Poncino M., Temporal Discharge Current Driven Clustering for Improved Leakage Power Reduction in Row-Based Power-Gating, in: Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, BERLIN / HEIDELBERG, Publisher Springer, 2009, pp. 42 - 51 (atti di: 18th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2008, featuring Integrated Circuit and System Design, Lisbon, September 10-12, 2008) [Contributo in Atti di convegno]
F. Mulas; D. Atienza; A. Acquaviva; S. Carta; L. Benini; G. De Micheli, Thermal Balancing Policy for Multiprocessor Stream Computing Platforms, «IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS», 2009, 28,12, pp. 110 - 123 [articolo]
A. Bonfietti; M. Lombardi; M. Milano; L. Benini, Throughput Constraint for Synchronous Data Flow Graphs, in: Integration of AI and OR Techniques in Constraint Programming for Combinatorial Optimization Problems, BERLIN/HEIDELBERG, Springer-Verlag, «LECTURE NOTES IN COMPUTER SCIENCE», 2009, pp. 26 - 40 (atti di: 6th International Conference, CPAIOR 2009, Pittsburgh, PA, USA, 2009 May 27-31) [Contributo in Atti di convegno]
Paterna F.; Benini L.; Acquaviva A.; Papariello F.; Desoli G., Variability-tolerant workload allocation for MPSoC energy minimization under real-time constraints, in: Embedded Systems for Real-Time Multimedia, 2009. ESTIMedia 2009, NEW YORK, IEEE Press, 2009, pp. 134 - 142 (atti di: Embedded Systems for Real-Time Multimedia, 2009. ESTIMedia 2009. IEEE/ACM/IFIP 7th Workshop on, Grenoble, France, 15-16 Oct 2009) [Contributo in Atti di convegno]
