Mazzoni B.; Tagliavini G.; Benini L.; Benatti S., An Optimized Heart Rate Detection System Based on Low-Power Microcontroller Platforms for Biosignal Processing, in: Advances in System-Integrated Intelligence. SYSINT 2022, Cham, Springer, 2023, 546, pp. 160 - 170 (atti di: International Conference on System-Integrated Intelligence, Genova, 7-9 Settembre 2022) [Contributo in Atti di convegno]Open Access
Amidei, Andrea; Rapa, Pierangelo Maria; Tagliavini, Giuseppe; Rabbeni, Roberto; Pavan, Paolo; Benatti, Simone, ANGELS - Smart Steering Wheel for Driver Safety, in: 2023 9th International Workshop on Advances in Sensors and Interfaces (IWASI), 2023, pp. 15 - 20 (atti di: International Workshop on Advances in Sensors and Interfaces (IWASI), Monopoli (Bari), Italy, 8-9 June 2023) [Contributo in Atti di convegno]Open Access
Tabanelli, Enrico; Tagliavini, Giuseppe; Benini, Luca, DNN Is Not All You Need: Parallelizing Non-neural ML Algorithms on Ultra-low-power IoT Processors, «ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS», 2023, 22, pp. 1 - 33 [articolo]Open Access
Gianmarco Ottavi; Angelo Garofalo; Giuseppe Tagliavini; Francesco Conti; Alfio Di Mauro; Luca Benini; Davide Rossi, Dustin: A 16-Cores Parallel Ultra-Low-Power Cluster With 2b-to-32b Fully Flexible Bit-Precision and Vector Lockstep Execution Mode, «IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS», 2023, 70, pp. 2450 - 2463 [articolo]Open Access
Bruschi, Nazareno; Tagliavini, Giuseppe; Garofalo, Angelo; Conti, Francesco; Boybat, Irem; Benini, Luca; Rossi, Davide, End-to-End DNN Inference on a Massively Parallel Analog In Memory Computing Architecture, in: 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), New York, IEEE, 2023, pp. 1 - 6 (atti di: Design, Automation & Test in Europe Conference & Exhibition (DATE), Antwerp, Belgium, 17-19 April 2023) [Contributo in Atti di convegno]Open Access
Valente, Luca; Tortorella, Yvan; Sinigaglia, Mattia; Tagliavini, Giuseppe; Capotondi, Alessandro; Benini, Luca; Rossi, Davide, HULK-V: a Heterogeneous Ultra-low-power Linux capable RISC-V SoC, in: 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), New York, IEEE, 2023, pp. 1 - 6 (atti di: Design, Automation & Test in Europe Conference & Exhibition (DATE), Antwerp, Belgium, 17-19 April 2023) [Contributo in Atti di convegno]Open Access
Mirsalari, Seyed Ahmad; Yousefzadeh, Saba; Tagliavini, Giuseppe; Stathis, Dimitrios; Hemani, Ahmed, Optimizing Self-Organizing Maps for Bacterial Genome Identification on Parallel Ultra-Low-Power Platforms, in: 2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), New York, IEEE, 2023, pp. 1 - 8 (atti di: 2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Istanbul, Turkiye, 04-07 Dicembre 2023) [Contributo in Atti di convegno]Open Access
Barchi F.; Pasini G.; Parisi E.; Tagliavini G.; Bartolini A.; Acquaviva A., RUST-Encoded Stream Ciphers on a RISC-V Parallel Ultra-Low-Power Processor, in: OpenAccess Series in Informatics, Schloss Dagstuhl- Leibniz-Zentrum fur Informatik GmbH, Dagstuhl Publishing, «OPEN ACCESS SERIES IN INFORMATICS», 2023, 107, pp. 1 - 12 (atti di: 14th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 12th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, PARMA-DITAM 2023, francia, 2023) [Contributo in Atti di convegno]
Chen J.; Loi I.; Flamand E.; Tagliavini G.; Benini L.; Rossi D., Scalable Hierarchical Instruction Cache for Ultralow-Power Processors Clusters, «IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS», 2023, 31, Article number: 10048762, pp. 456 - 469 [articolo]Open Access
Mirsalari, Seyed Ahmad; Tagliavini, Giuseppe; Rossi, Davide; Benini, Luca, TransLib: A Library to Explore Transprecision Floating-Point Arithmetic on Multi-Core IoT End-Nodes, in: 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2023, pp. 1 - 2 (atti di: Design, Automation & Test in Europe Conference & Exhibition (DATE), Antwerp, Belgium, 17-19 April 2023) [atti di convegno-abstract]
Montagna F.; Mach S.; Benatti S.; Garofalo A.; Ottavi G.; Benini L.; Rossi D.; Tagliavini G., A Low-Power Transprecision Floating-Point Cluster for Efficient Near-Sensor Data Analytics, «IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS», 2022, 33, pp. 1038 - 1053 [articolo]Open Access
Tabanelli E.; Tagliavini G.; Benini L., Optimizing Random Forest Based Inference on RISC-V MCUs at the Extreme Edge, «IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS», 2022, 41, pp. 4516 - 4526 [articolo]Open Access
Nadalini D.; Rusci M.; Tagliavini G.; Ravaglia L.; Benini L.; Conti F., PULP-TrainLib: Enabling On-Device Training for RISC-V Multi-core MCUs Through Performance-Driven Autotuning, in: Embedded Computer Systems: Architectures, Modeling, and Simulation, Springer, 2022, 13511, pp. 200 - 216 (atti di: 22nd International Conference, SAMOS 2022, Samos, Greece, July 3–7, 2022) [Contributo in Atti di convegno]Open Access
Bruschi N.; Tagliavini G.; Conti F.; Abadal S.; Cabellos-Aparicio A.; Alarcon E.; Karunaratne G.; Boybat I.; Benini L.; Rossi D., Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference, in: 2022 IEEE 4th International Conference on Artificial Intelligence Circuits and Systems (AICAS), 2022, pp. 170 - 173 (atti di: Artificial Intelligence Circuits and Systems (AICAS), Incheon, Korea, Republic of Korea, 13-15 June 2022) [Contributo in Atti di convegno]Open Access
Rossi D.; Conti F.; Eggiman M.; Mauro A.D.; Tagliavini G.; Mach S.; Guermandi M.; Pullini A.; Loi I.; Chen J.; Flamand E.; Benini L., Vega: A Ten-Core SoC for IoT Endnodes with DNN Acceleration and Cognitive Wake-Up from MRAM-Based State-Retentive Sleep Mode, «IEEE JOURNAL OF SOLID-STATE CIRCUITS», 2022, 57, pp. 127 - 139 [articolo]Open Access
