Das, Satyajit; Martin, Kevin J.M.; Coussy, Philippe; Rossi, Davide; Benini, Luca, Efficient mapping of CDFG onto coarse-grained reconfigurable array architectures, in: Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, Institute of Electrical and Electronics Engineers Inc., 2017, pp. 127 - 132 (atti di: 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017, jpn, 2017) [Contributo in Atti di convegno]
Rossi, Davide; Pullini, Antonio; Loi, Igor; Gautschi, Michael; Gurkaynak, Frank Kagan; Teman, Adam; Constantin, Jeremy; Burg, Andreas; Miro-Panades, Ivan; Beigne, Edith; Clermidy, Fabien; Flatresse, Philippe; Benini, Luca, Energy-Efficient Near-Threshold Parallel Computing: The PULPv2 Cluster, «IEEE MICRO», 2017, 37, Article number: 8065010, pp. 20 - 31 [articolo]
Montagna, Fabio; Benatti, Simone; Rossi, Davide, Flexible, scalable and energy efficient bio-signals processing on the PULP platform: A case study on seizure detection, «JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS», 2017, 7, Article number: 16, pp. 1 - 19 [articolo]Open Access
Gomez, A.; Bartolini, A.; Rossi, D.; Can Kara, B.; Fatemi, H.; Pineda de Gyvez, J.; Benini, L., Increasing the energy efficiency of microcontroller platforms with low-design margin co-processors, «MICROPROCESSORS AND MICROSYSTEMS», 2017, 53, pp. 213 - 228 [articolo]
Azarkhish, Erfan; Pfister, Christoph; Rossi, Davide; Loi, Igor; Benini, Luca, Logic-Base Interconnect Design for Near Memory Computing in the Smart Memory Cube, «IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS», 2017, 25, pp. 210 - 223 [articolo]
Gautschi, Michael; Schiavone, Pasquale Davide; Traber, Andreas; Loi, Igor; Pullini, Antonio; Rossi, Davide; Flamand, Eric; Gurkaynak, Frank K.; Benini, Luca, Near-Threshold RISC-V Core With DSP Extensions for Scalable IoT Endpoint Devices, «IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS», 2017, 25, pp. 2700 - 2713 [articolo]Open Access
Davide Schiavone, Pasquale; Conti, Francesco; Rossi, Davide; Gautschi, Michael; Pullini, Antonio; Flamand, Eric; Benini, Luca, Slow and steady wins the race? A comparison of ultra-low-power RISC-V cores for Internet-of-Things applications, in: Proceedings of 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2017, pp. 1 - 8 (atti di: 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), Thessaloniki, Greece, Greece, 25-27 September 2017) [Contributo in Atti di convegno]
Di Mauro, Alfio; Rossi, Davide; Pullini, Antonio; Flatresse, Philippe; Benini, Luca, Temperature and process-aware performance monitoring and compensation for an ULP multi-core cluster in 28nm UTBB FD-SOI technology, in: Di Mauro, Alfio, 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2017, pp. 1 - 8 (atti di: 2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), Thessaloniki, Greece, 25-27 Sept. 2017) [Contributo in Atti di convegno]Open Access
Rossi, Davide; Loi, Igor; Pullini, Antonio; Benini, Luca, Ultra-Low-Power Digital Architectures for the Internet of Things, in: Rossi, Davide, Enabling the Internet of Things, Cham (ZG), Springer International Publishing, 2017, pp. 69 - 93 [capitolo di libro]
Pullini, Antonio; Conti, Francesco; Rossi, Davide; Loi, Igor; Gautschi, Michael; Benini, Luca, A heterogeneous multi-core system-on-chip for energy efficient brain inspired vision, in: Proceedings - IEEE International Symposium on Circuits and Systems, Institute of Electrical and Electronics Engineers Inc., 2016, 2016-, pp. 2910 - 2910 (atti di: 2016 IEEE International Symposium on Circuits and Systems, ISCAS 2016, Montreal's Sheraton Centre, can, 2016) [Contributo in Atti di convegno]
Crescentini, M.; Biondi, M.; Bennati, M.; Alberti, P.; Luciani, G.; Tamburini, C.; Pizzotti, M.; Romani, A.; Tartagni, M.; Bellasi, D.; Rossi, D.; Benini, L.; Marchesi, M.; Cristaudo, D.; Canegallo, R., A 2 MS/s 10A Hall current sensor SoC with digital compressive sensing encoder in 0.16 μm BCD, in: European Solid-State Circuits Conference, IEEE, 2016, 2016-, pp. 393 - 396 (atti di: 42nd European Solid-State Circuits Conference, ESSCIRC 2016, Lausanne, 2016) [Contributo in Atti di convegno]
Rossi, Davide; Pullini, Antonio; Loi, Igor; Gautschi, Michael; Gürkaynak, Frank K.; Bartolini, Andrea; Flatresse, Philippe; Benini, Luca, A 60 GOPS/W, -1.8 v to 0.9 v body bias ULP cluster in 28 nm UTBB FD-SOI technology, «SOLID-STATE ELECTRONICS», 2016, 117, pp. 170 - 184 [articolo]
Tagliavini, Giuseppe; Marongiu, Andrea; Rossi, Davide; Benini, Luca, Always-on motion detection with application-level error control on a near-threshold approximate computing platform, in: 2016 IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016, Institute of Electrical and Electronics Engineers Inc., 2016, pp. 552 - 555 (atti di: 23rd IEEE International Conference on Electronics, Circuits and Systems, ICECS 2016, mco, 2016) [Contributo in Atti di convegno]
Rusci, Manuele; Rossi, Davide; Lecca, Michela; Gottardi, Massimo; Farella, Elisabetta; Benini, Luca, An Event-Driven Ultra-Low-Power Smart Visual Sensor, «IEEE SENSORS JOURNAL», 2016, 16, Article number: 7456200, pp. 5344 - 5353 [articolo]Open Access
Azarkhish, Erfan; Rossi, Davide; Loi, Igor; Benini, Luca, Design and evaluation of a processing-in-memory architecture for the smart memory cube, in: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), Springer Verlag, 2016, 9637, pp. 19 - 31 (atti di: 29th International Conference on Architecture of Computing Systems, ARCS 2016, deu, 2016) [Contributo in Atti di convegno]
