Foto del docente

Roberto Guerrieri

Professor

Department of Electrical, Electronic, and Information Engineering "Guglielmo Marconi"

Academic discipline: ING-INF/01 Electronic Engineering

Research

Keywords: Three-Dimensional packaging Reconfigurable digital architectures Brain imaging Sensors

The first project is developing a novel class of biosensors able to detect single cell-to-cell interactions and will provide a tool for improved monitoring and treatment of cancer. This work is supported by an European project. The second line is focused on reconfigurable computing, an appealing approach to cope with high performance requirements and increasing design and production costs in semiconductor technology. Within the framework of an European project we are developing a new processor with reconfigurable instruction set. Three dimensional (3D) integration is a very promising technology for the effective integration of complex systems: devices that are optimally implemented with various different technologies can be separately manufactured and then stacked and connected by means of efficient vertical interconnections over a very short range. We are developing a technology that provides wireless interfaces between silicon dies.
The last activity is on hardware and software techniques for brain imaging; Roberto Guerrieri is the principal investigator of FP7 project CREAM which covers these themes.


The first project will develop a novel class of biosensors able to detect single cell-to-cell interactions and will provide a tool for improved monitoring and treatment of cancer. In fact, several promising technologies for the immunotherapy of cancer are currently hampered by the need to get information about the interaction among biologically active cells, information that is currently unavailable or difficult to achieve with the existing technology. In addition, this information should be available in a cost effective way, as soon as possible and without needing a complex laboratory infrastructure. The strategic objectives achieved by this project are the following: 1.demonstration of a cell-based biosensor and its macro-to-micro interfaces allowing delivery, detec-tion and recovery of effector and target cells with-out interfering with their gene expression; 2.demonstration of a new microtechnology which integrates on the same platform microfluidics, electronics, sensing and living cell management; 3.sensing of cell-to-cell interactions at single cell level, overcoming the low signal levels; 4.evaluation of this biosensor using in vitro and animal models. Reconfigurable computing is an appealing approach to cope with high performance requirements and increas-ing design and production costs in semiconductor technology. Traditional processors and DSPs represent the best way to amortize mask costs since they are software programmable and can be used for a wide range of applications. However ASICs still have a great advantage in portable applications where low power consump-tion together with high computational performance is required. Reconfigurable processors have been proposed as the best trade-off between efficiency and flexibility for next years computing architectures. Our architecture share the programming advantage of standard processors since it can be efficiently programmed in C, while offers the capabilities of Application-Specific processors thanks to its reconfigurable instruction set that can be modified run-time in order to get the best performances in each computing kernel. The processor developed in this work is currently in evaluation for application in a new line of products of ST Microelectronics thanks to its good power/performance ratio as measured in several computing kernels. Three dimensional (3D) integration is a very promising technology for the effective integration of complex sys-tems: devices that are optimally implemented with various different technologies can be separately manufac-tured and then stacked and connected by means of efficient vertical interconnections over a very short range; this provides most of the benefits of on-chip integration while leveraging the yield improvement and manufac-turing capability of separate components. Many solutions have been presented for the realization of 3D sys-tems, such as System-in-Package, Through Substrate VIAs and wireless interconnections. The target of this research is the development of a technology that can support the integration of heterogeneous silicon proc-esses without performance degradation induced by on-board connectivity. This broad target suggests the de-velopment of technologies and approaches that are minimally invasive from a standpoint of process modifica-tion, so that existing optimized processes, such as deep submicron CMOS, high-voltage BCD, non-volatile memories, etc can be seamlessly integrated. We have approached this target by developing new circuits and architectures that support contactless communication between dies and support an area-normalized I/O band-width that is the maximum available so far in the world.

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