Foto del docente

Daniele Cesarini

PhD Student

Department of Electrical, Electronic, and Information Engineering "Guglielmo Marconi"

Publications

Cesarini, Daniele; Bartolini, Andrea; Benini, Luca, Benefits in Relaxing the Power Capping Constraint, in: Proceedings of the 1st Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, 2017, pp. 1 - 6 (atti di: 1st Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, Portland, OR, USA, 9-9-2017) [Contribution to conference proceedings]

Cesarini Daniele; Bartolini Andrea; Benini Luca, Energy Saving and Thermal Management Opportunities in a Workload-Aware MPI Runtime for a Scientific HPC Computing Node, in: Parallel Computing is Everywhere, Amsterdam, IOS Press BV, 2017, pp. 277 - 286 (ADVANCES IN PARALLEL COMPUTING) [Chapter or essay]

Cesarini, Daniele; Bartolini, Andrea; Benini, Luca, Prediction horizon vs. efficiency of optimal dynamic thermal control policies in HPC nodes, in: Cesarini, Daniele, Prediction horizon vs. efficiency of optimal dynamic thermal control policies in HPC nodes, 2017, pp. 1 - 6 (atti di: 2017 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Abu Dhabi, United Arab Emirates, 23-25 October 2017) [Contribution to conference proceedings]

Cesarini, Daniele; Marongiu, Andrea; Benini, Luca, An optimized task-based runtime system for resource-constrained parallel accelerators, in: Proceedings of the 2016 Design, Automation and Test in Europe Conference and Exhibition, DATE 2016, Institute of Electrical and Electronics Engineers Inc., 2016, pp. 1261 - 1266 (atti di: 19th Design, Automation and Test in Europe Conference and Exhibition, DATE 2016, International Congress Centre Dresden (ICC), deu, 2016) [Contribution to conference proceedings]

Rahimi, Abbas; Cesarini, Daniele; Marongiu, Andrea; Gupta, Rajesh K.; Benini, Luca, Task scheduling strategies to mitigate hardware variability in embedded shared memory clusters, in: Proceedings - Design Automation Conference, Institute of Electrical and Electronics Engineers Inc., 2015, 2015-, pp. 1 - 6 (atti di: 52nd ACM/EDAC/IEEE Design Automation Conference, DAC 2015, San Francisco, CA-USA, 2015) [Contribution to conference proceedings]

Rahimi, Abbas; Cesarini, Daniele; Marongiu, Andrea; Gupta, Rajesh K.; Benini, Luca, Improving resilience to timing errors by exposing variability effects to software in tightly-coupled processor clusters, «IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS», 2014, 4, pp. 216 - 229 [Scientific article]

Latest news

At the moment no news are available.

Highlights