35326 - Digital System Electronics Laboratory (Graduate Course)

Academic Year 2018/2019

  • Teaching Mode: Traditional lectures
  • Campus: Bologna
  • Corso: Second cycle degree programme (LM) in Electronic Engineering (cod. 0934)

Learning outcomes

Goal of the course is to familiarize students with the design and optimization of CMOS IC digital circuits with respect to different quality metrics: cost, speed, reliability, and power dissipation. The students will design digital cells and macrocells at different abstraction levels and characterize complex modules such as adders, multipliers, and memories by using a CMOS technology and CAD tools available thanks to  Europractice program. 

Course contents

  • Cell-based design methodology, characterization of combinational logic gates and sequential cells for logic simulation and synthesis tools. Models to estimate delay and power. Digital semi-custom design flow: front-end flow starting from RTL entry (using VHDL language), simulation and synthesis. Analysis of the layout of standard cells. Back-end flow (place&route).

  • Characterization of the available CMOS technology. Analysis and simulation of electrical static and dynamic MOS transistor properties, electrical properties of interconnect wires.

  • Student design activity aimed at creating a cell library (schematic and layout design, transistor level simulation in order to compute the values of the parameters used in delay and power models, description of the cell in a hardware description language).  Each student will design a combinational cell and a static register.
  • Student's main project activity: design and characterization of a complex module such as adders, multipliers, and memories. The activity will cover different design abstraction levels (architectural, logic, transistor-level and layout).

Readings/Bibliography

  1. Jan M. Rabaey,  Anantha  P. Chandrakasan, Borivoje Nikolic,  Digital Integrated Circuits: A Design Perspective, 2nd Edition 2003, Prenctice Hall  (http://bwrc.eecs.berkeley.edu/Classes/IcBook/index.html)

Teaching methods

The students will design and characterize logic and sequential cells and complex modules such as adders, multipliers, and memories in CMOS technology by using CAD tools available thanks the Europractice program.

Assessment methods

Students have to present a written report on the project activity and then discuss the obtained results. 

Teaching tools

Additional docs (in italian) are available via web.

Office hours

See the website of Eleonora Franchi Scarselli