73388 - DIGITAL SYSTEMS M

Conoscenze e abilità da conseguire

Provide a vision of digital circuits at transistor and gate level so as to have clear ideas about the main factors determining circuit performance, power consumption, signal integrity digital throughput.

Contenuti

Course: Digital Systems M

CFU: 6

Professor: Davide Rossi

Contacts

Tel: 051 2093843
Email: davide.rossi@unibo.it

Class Schedule

Wednesday 11:30 - 14:00 - Room 5.1
Thursday 13:00 - 15:30 - Room 7.7

Program

Introduction. Brief history of digital circuits design. Hierarchical design and levels of abstractions in digital systems. Brief introduction to digital design methodologies. Main fundamental metrics that helps to quantify cost, reliability and performance of a design.

Hardware Description Languages. Purpose and types of Hardware Description Languages. Introduction to System Verilog, description of operators, modules, primitives, procedural blocks, combinational vs. sequential logic, blocking vs. non-blocking assignment. Register transfer level design partitioning. Example of digital building blocks, finite state machines.

The MOS transistor. Description of n-MOS and p-MOS transistor behavior. Description of device models, operating regions, static characteristic, channel length modulation, velocity saturation, drain current vs. voltage, sub-threshold conductance, dynamic behavior. Effects of technology scaling on device parameters.

CMOS technology and circuits. Introduction to basic digital gates. I/O inverter characteristic. Inverter design for optimum performance. Power consumption of CMOS inverters. Dynamic behavior of CMOS inverters. CMOS inverter design from delay specifications. Design of NOR and NAND CMOS gates. Design of complex CMOS gates. Dynamic and DOMINO logic. Pass transistor logic.

Sequential circuits. Static latches and registers. Temporal constraints of sequential circuits: setup and hold time. Characterization of static registers for integration in automated design flows. Dynamic latches and registers. Clock distribution. Discussion about setup and hold times at system level. Skew and jitter in sequential digital circuits, impact on performance, area, power.

Arithmetic circuits. Full adder schemes in FCMOS, mirror, pass-transistor and dynamic logic. Ripple Carry adder. Carry Look-ahead adders (carry skip, carry select, binary tree). Comparison of area, power, performance metrics. Serial multiplier, parallel multiplier, binary tree multipliers. Introduction to floating-point formats and circuits.

Semiconductor Memories. Classification. Single and multi-bank architecture SRAM memories, elementary cell and sizing criteria. Static power reduction. Multi-ported memories, Associative memories. Introduction to DRAM memories, and non-volatile memories.

Design Methodologies. FPGA, CPLD, ASIC full-custom, semi-custom, digital design flows, logic vs. physical synthesis, floorplan, power planning, place & route, clock tree synthesis, signoff, static timing analysis.

Prerequisites

- Analysis and synthesis of combinational and sequential circuits (Introduction to Computer Architectures M).
- Basic knowledge on analysis and design of digital electronic circuits (Elettronica-T1).

Exam

Oral Examination.

Testi/Bibliografia

J.M. Rabaey, A. Chandrakasan, B. Nikolic: “Digital Integrated Circuits: a Design Perspective, Second Edition”, Prentice Hall Int.

Metodi didattici

Class lectures

Modalità di verifica e valutazione dell'apprendimento

Final oral exam

Strumenti a supporto della didattica

Lecture notes deposited in the site IOL.

Orario di ricevimento

Consulta il sito web di Davide Rossi