65777 - Electronics for information, energy generation and management (2nd cycle)

Learning outcomes

By the end of the course, the student understands the operating principles and the fabrication technologies of the most important semiconductor devices that are present in digital, analog, and power circuits, with emphasis on applications in the fields of energy efficiency for environmental sustainability.

Course contents

Quantum mechanics and semiclassical transport model: the wave particle dualism for the electron.

The Schroedinger equation; energy quantization; dispersion relationship for a crystal: direct (Si) and indirect (GaAS) bandgap.

The effective mass approximation. Quantum-mechanical tunneling.

Electron and Holes in semiconductors. Semiconductors at equilibrium. Charge transport in semiconductors. Drift-diffusion transport model. P-N Junction at equilibrium and off equilibrium. P-N I-V characteristics. Non-ideality and non-stationary effects. 

MOS structure and MOS capacitor. Qualitative and quantitative analysis. Threshold voltage and capacitances.

MOS transistor. Gradual channel approximation and I-V characteristics. Subthreshold. Non ideality effects. Scaling. Short channel effects. Advanced structures and fundamental limits.

Photo-voltaics devices and modules. Power MOSFETs. Micro- and nano-electronics technology evolution.

IC fabrication Technology

Evolution of the CMOS Technology

SOI Technology

FinFET and Tri-gate MOSFETs

Organic Semiconductors.

Transistors based on organic semiconductors.

Organic LEDs.

Organic Photovoltaic cells.

Microelectronic design, with focus on the design flow for integrated circuits based on CAD software foe EDA (Electronic Design Automation)

• The CMOS process: technology, design flow and software tools. Recalling propagation delays and power consumption of static CMOS digital logic. Design rules for combinational logic on static CMOS. CMOS static registers, propagation delay, setup and hold times. Parasitic effects associated to the MOS transistors and interconnections. The SPICE circuit simulator.
• Models of the MOS transistor. Layout of the MOS transistor. Variability of parameters, simulation corners and device matching. Layout of digital macrocells with standard cells. Design rules and DRC and LVS checks. Parasitic extraction and post-layout simulations of macrocells. Pad frames and ESD protections. Design, layout and simulation of macrocells with CAD EDA software tools.
• MEMS technologies: fabrication processes, examples of basic structures and sensors.

Readings/Bibliography

Dispositivi per la microelettronica
G. Ghione, Mc GrawHill Italia, 1998.

Fundamentals of MODERN VLSI DEVICES
Yuan Taur, Tak H. Ning
Cambridge University Press
ISBN 0 521 55959 6

J. D. Plummer, M. D. Deal, P. B. Griffin, "Silicon VLSI Technology - Fundamentals, Practice and Modeling", Prentice Hall, 2000

Richard S. Muller, Theodore I. Kamins, “Device Electronics for Integrated Circuits, 3rd Edition”, ISBN: 978-0-471-59398-0

J. Rabaey, A. Chandrakasan, B. Nikolic, Digital Integrated Circuits: A Design Perspective, 2nd Edition 2003, Prenctice Hall. (http://bwrc.eecs.berkeley.edu/Classes/IcBook/index.html)

R. Baker, CMOS Circuit Design, Layout, and Simulation, Third Edition, Wiley-IEEE Press, 2010. (http://cmosedu.com).

 

Teaching methods

Conventional teaching with blackboard and with the aid of slides.

Laboratory experimental and simulation analysis of transistors and solar cells

Hands-on lectures held in the Laboratory of Electronics and Telecommunications for practicing the use of CAD ESA software tools for the design of integrated circuits. In addition to normal teaching activity, during the course seminars held by experts from industry and/or research may be held.

Assessment methods

Oral exam

The students will develop the design of a digital circuit based on standard cells in a reference CMOS technology. A technical report shall be delivered and shall present the main design choices and the achieved performance with circuit simulations. The report will be discussed in an oral examination that will also check the knowledge of the design concepts presented in the course.

The most important elements of the assessments will include the knowledge and proper application of the concepts and of the design techniques presented in the course, the capability of autonomously applying the concepts presented in the course, and the correct use of the technical language of the discipline.

Moreover, the students shall design a digital circuit in a reference CMOS technology based on standard cells, and will prepare a report or a presentation that highlights the main design choices and assesses the achieved performance by means of circuit simulations. The exam will consist in a discussion of the technical report and in an oral examination on the contents of the course. The most important elements of the assessments will include the knowledge and proper application of the concepts and of the design techniques presented in the course, the capability of autonomously applying the concepts presented in the course, and the correct use of the technical language of the discipline.

Teaching tools

Slides.

Numerical simulation programs.

Instrumentation for experimental characterization of transistors and solar cells.

Recording of some lessons related to particularly significant concepts, or whose contents could lead to issues in relation to the students' learning process, available through the "virtuale" platform.

Besides conventional class equipment, the module will make extensive use of the laboratory of Electronics equipped with workstation with CAD EDA tools for microelectronic design.

Office hours

See the website of Claudio Fiegna

See the website of Aldo Romani

See the website of Enrico Sangiorgi