You are here:

03716 - Digital Design Principles and Computer Architecture

Academic Year 2021/2022

                
                        Docente:
                        Luca Roffia
                    
                        Credits:
                        9
                    
                        SSD:
                        ING-INF/05
                    
                        Language:
                        Italian
                    
                        Moduli:
                        
                            Luca Roffia
                            (Modulo 1)
                        
                            Luca Roffia
                            (Modulo 2)
                        
                        Teaching Mode:
                        
                                    Traditional lectures (Modulo 1)
                                
                                    Traditional lectures (Modulo 2)
                                
                            Campus:
                            Cesena
                        
                            Corso:
                            First cycle degree programme (L) in
                            Electronics Engineering for Energy and Information (cod. 8767)

                                Also valid for
                                
                                    First cycle degree programme (L) in
                                    
                                        Biomedical Engineering (cod. 9082)
                                    
                            Teaching resources on Virtuale

Learning outcomes

The course provides a reference framework to understand the behaviour of simple microprocessor based systems, focusing on:
- logic design principles and reference model
- digital systems core components
- basics of computer architecture
- architecture impact on performance
- system design

Course contents

Information Coding and binary codes Analysis and synthesis of combinational, asynchronous and synchronous circuits Von Neumann conceptual model of stored program computers
Computer Architecture and performance
ISA (Instruction Set Architecture) RISC and CISC Architectures
CPU structure and ISA implementation:
Control Unit and Data path
Sequential implementation of a RISC processor (DLX)
Exception handling and input/output processing
Interfacing memory and and input/output devices to the microprocessor bus
Design of simple microprocessor based systems

Readings/Bibliography

Ashenden: "Digital Design" - Morgan Kaufmann pub. Inc.
Hennessy Patterson: "Computer architecture: a quantitative approach" - Morgan Kaufmann pub. Inc.

Teaching methods

Slides stored in the platform (IOL) are presented and interactively discussed in the classroom.

Assessment methods

Assessment os based on three written tests. Each test addresses a specific syllabus section:

Digital circuit theory: combinational logic and synchronous sequential machines (1 hour)
CPU hardware architecture (ISA and CPU structure: Control Unit and Data Path) (55 minutes)
Input/output management: hardware and software drivers (two hours)

There are 33 points available for each test. The final result is the average rounded to the nearest integer. If the average is above 30, then you get "30 e Lode".

Office hours

See the website of Luca Roffia