III-V-MOS

Technology CAD for III-V Semiconductor-based MOSFETs

According to ITRS, III-V compound semiconductor n-type MOSFETs will reach production in 2018 as part of a new scaling scenario for high performance at very low voltage. The present lack of dependable TCAD models for the early stages of industrial development is a hindrance to benefit from the cost saves and time to market reduction that TCAD is recognized to deliver. To bridge this gap, III-V-MOS aims to provide to the European Semiconductor Industry accurate device simulation models and methods, integrated into TCAD tools, for successful introduction in CMOS technology of optimized device designs based on III-V MOSFETs at and beyond the 14nm node. III-V-MOS will develop, validate and transfer to industry a new device simulation methodology enabling the use of accurate quantum drift-diffusion and Monte Carlo TCAD tools. The models, calibrated by comparison with measurements on complete devices and ad-hoc test structures, will provide comprehensive descriptions of Ultra Thin Body Semiconductor on Insulator FETs, FinFETs and nanowire FETs at and beyond the 14nm node including device parasitics. A hierarchical approach will be used, starting from atomistic band structure calculations all the way down to customized TCAD simulation setups ready for direct use in an industrial environment. Systematic application of the new methodology under industrial guidance will provide new insight in nanoscale III-V semiconductor device physics and identify the potential of the technology boosters, thus substantially reducing the options to be explored for the device design and the corresponding costs. Future exploitation and high impact of the project results are guaranteed by the TCAD market leader (Synopsys); by a SME specialized in the growing business of atomistic simulations for technology development (QuantumWise); by a research center (IMEC) and an industry lab (IBM) engaged in CMOS fabrication technology development and by the European foundry GLOBALFOUNDRIES Dresden.

Coordinator Consorzio Nazionale Interuniversitario Per La Nanoelettronica-IUNET (Italy), di cui sono "terze parti":
Università degli Studi di Modena e Reggio Emilia (Italy)
Università degli Studi di Udine (Italy)
ALMA MATER STUDIORUM-UNIVERSITA DI BOLOGNA
- Centro di Ricerca sui Sistemi Elettronici per l'Ingegneria 
dell'Informazione e delle Telecomunicazioni "Ercole De Castro" – 
ARCES
- Resp. Scientifico: Prof. Antonio Gnudi

Other participants:
Interuniversitair Micro-Electronica Centrum Vzw (Belgium)
Eidgenoessische Technische Hochschule Zurich (Switzerland)
IBM Research Gmbh (Switzerland)
Synopsys Switzerland Llc (Switzerland)
Globalfoundries Dresden Module One Llc & Co. Kg (Germany)
Quantumwise A/S (Denmark)
Institut Sinano Association (France)

 

Start date 01/11//2013

End date 31/10/2016

Duration 36 months

Project Reference 619326

Project cost 4.336.961 EURO

Project Funding 2.900.000 EURO

Area FP7- COOPERATION - ICT

Subprogramme Area ICT-2013.3.1 - Nanoelectronics

Contract type Collaborative project